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Searched refs:DDRPHYC_ACDLLCR_DLLSRST_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h8528 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
8529 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp151fxx_cm4.h8691 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
8692 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp151axx_ca7.h8528 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
8529 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp151axx_cm4.h8494 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
8495 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp151dxx_cm4.h8494 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
8495 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp151cxx_ca7.h8725 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
8726 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp151cxx_cm4.h8691 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
8692 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp151fxx_ca7.h8725 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
8726 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp153axx_ca7.h10079 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10080 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp153axx_cm4.h10045 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10046 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp153cxx_ca7.h10276 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10277 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp153cxx_cm4.h10242 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10243 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp153dxx_ca7.h10079 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10080 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp153dxx_cm4.h10045 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10046 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp153fxx_ca7.h10276 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10277 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp153fxx_cm4.h10242 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10243 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp157axx_ca7.h10194 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10195 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp157axx_cm4.h10160 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10161 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp157cxx_ca7.h10391 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10392 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp157cxx_cm4.h10357 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10358 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp157dxx_ca7.h10194 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10195 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp157dxx_cm4.h10160 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10161 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp157fxx_ca7.h10391 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10392 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */
Dstm32mp157fxx_cm4.h10357 #define DDRPHYC_ACDLLCR_DLLSRST_Pos (30U) macro
10358 #define DDRPHYC_ACDLLCR_DLLSRST_Msk (0x1UL << DDRPHYC_ACDLLCR_DLLSRST_Pos) /*!< 0x40000000 */