| /hal_stm32-latest/stm32cube/stm32mp1xx/soc/ |
| D | stm32mp151dxx_ca7.h | 5992 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 5993 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5995 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5996 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5997 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5998 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5999 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp151fxx_cm4.h | 6155 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 6156 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6158 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6159 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6160 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6161 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6162 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp151axx_ca7.h | 5992 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 5993 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5995 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5996 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5997 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5998 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5999 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp151axx_cm4.h | 5958 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 5959 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5961 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5962 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5963 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5964 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5965 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp151dxx_cm4.h | 5958 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 5959 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5961 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5962 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5963 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5964 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 5965 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp151cxx_ca7.h | 6189 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 6190 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6192 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6193 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6194 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6195 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6196 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp151cxx_cm4.h | 6155 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 6156 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6158 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6159 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6160 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6161 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6162 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp151fxx_ca7.h | 6189 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 6190 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6192 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6193 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6194 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6195 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 6196 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp153axx_ca7.h | 7543 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7544 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7546 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7547 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7548 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7549 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7550 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp153axx_cm4.h | 7509 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7510 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7512 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7513 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7514 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7515 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7516 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp153cxx_ca7.h | 7740 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7741 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7743 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7744 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7745 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7746 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7747 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp153cxx_cm4.h | 7706 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7707 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7709 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7710 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7711 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7712 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7713 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp153dxx_ca7.h | 7543 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7544 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7546 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7547 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7548 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7549 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7550 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp153dxx_cm4.h | 7509 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7510 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7512 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7513 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7514 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7515 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7516 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp153fxx_ca7.h | 7740 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7741 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7743 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7744 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7745 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7746 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7747 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp153fxx_cm4.h | 7706 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7707 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7709 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7710 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7711 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7712 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7713 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp157axx_ca7.h | 7658 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7659 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7661 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7662 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7663 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7664 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7665 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp157axx_cm4.h | 7624 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7625 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7627 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7628 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7629 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7630 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7631 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp157cxx_ca7.h | 7855 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7856 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7858 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7859 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7860 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7861 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7862 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp157cxx_cm4.h | 7821 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7822 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7824 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7825 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7826 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7827 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7828 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp157dxx_ca7.h | 7658 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7659 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7661 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7662 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7663 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7664 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7665 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp157dxx_cm4.h | 7624 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7625 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7627 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7628 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7629 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7630 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7631 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp157fxx_ca7.h | 7855 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7856 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7858 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7859 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7860 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7861 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7862 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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| D | stm32mp157fxx_cm4.h | 7821 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos (0U) macro 7822 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Msk (0x1FUL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7824 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_0 (0x1UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7825 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_1 (0x2UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7826 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_2 (0x4UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7827 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_3 (0x8UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x… 7828 #define DDRCTRL_PWRTMG_POWERDOWN_TO_X32_4 (0x10UL << DDRCTRL_PWRTMG_POWERDOWN_TO_X32_Pos) /*!< 0x…
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