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Searched refs:DDRCTRL_MRCTRL1_MR_DATA_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h5892 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
5893 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
5895 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
5896 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
5897 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
5898 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
5899 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
5900 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
5901 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
5902 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp151fxx_cm4.h6055 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
6056 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
6058 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
6059 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
6060 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
6061 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
6062 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
6063 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
6064 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
6065 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp151axx_ca7.h5892 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
5893 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
5895 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
5896 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
5897 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
5898 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
5899 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
5900 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
5901 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
5902 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp151axx_cm4.h5858 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
5859 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
5861 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
5862 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
5863 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
5864 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
5865 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
5866 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
5867 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
5868 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp151dxx_cm4.h5858 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
5859 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
5861 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
5862 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
5863 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
5864 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
5865 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
5866 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
5867 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
5868 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp151cxx_ca7.h6089 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
6090 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
6092 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
6093 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
6094 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
6095 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
6096 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
6097 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
6098 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
6099 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp151cxx_cm4.h6055 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
6056 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
6058 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
6059 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
6060 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
6061 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
6062 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
6063 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
6064 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
6065 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp151fxx_ca7.h6089 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
6090 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
6092 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
6093 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
6094 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
6095 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
6096 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
6097 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
6098 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
6099 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp153axx_ca7.h7443 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7444 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7446 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7447 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7448 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7449 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7450 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7451 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7452 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7453 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp153axx_cm4.h7409 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7410 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7412 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7413 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7414 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7415 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7416 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7417 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7418 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7419 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp153cxx_ca7.h7640 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7641 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7643 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7644 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7645 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7646 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7647 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7648 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7649 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7650 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp153cxx_cm4.h7606 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7607 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7609 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7610 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7611 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7612 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7613 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7614 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7615 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7616 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp153dxx_ca7.h7443 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7444 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7446 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7447 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7448 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7449 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7450 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7451 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7452 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7453 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp153dxx_cm4.h7409 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7410 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7412 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7413 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7414 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7415 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7416 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7417 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7418 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7419 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp153fxx_ca7.h7640 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7641 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7643 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7644 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7645 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7646 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7647 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7648 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7649 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7650 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp153fxx_cm4.h7606 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7607 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7609 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7610 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7611 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7612 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7613 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7614 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7615 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7616 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp157axx_ca7.h7558 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7559 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7561 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7562 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7563 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7564 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7565 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7566 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7567 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7568 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp157axx_cm4.h7524 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7525 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7527 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7528 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7529 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7530 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7531 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7532 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7533 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7534 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
[all …]
Dstm32mp157cxx_ca7.h7755 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7756 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7758 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7759 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7760 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7761 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7762 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7763 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7764 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7765 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
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Dstm32mp157cxx_cm4.h7721 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7722 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7724 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7725 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7726 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7727 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7728 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7729 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7730 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7731 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
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Dstm32mp157dxx_ca7.h7558 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7559 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7561 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7562 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7563 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7564 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7565 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7566 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7567 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7568 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
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Dstm32mp157dxx_cm4.h7524 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7525 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7527 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7528 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7529 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7530 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7531 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7532 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7533 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7534 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
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Dstm32mp157fxx_ca7.h7755 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7756 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7758 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7759 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7760 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7761 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7762 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7763 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7764 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7765 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
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Dstm32mp157fxx_cm4.h7721 #define DDRCTRL_MRCTRL1_MR_DATA_Pos (0U) macro
7722 #define DDRCTRL_MRCTRL1_MR_DATA_Msk (0xFFFFUL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x0000FFFF */
7724 #define DDRCTRL_MRCTRL1_MR_DATA_0 (0x1UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000001 */
7725 #define DDRCTRL_MRCTRL1_MR_DATA_1 (0x2UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000002 */
7726 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */
7727 #define DDRCTRL_MRCTRL1_MR_DATA_3 (0x8UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000008 */
7728 #define DDRCTRL_MRCTRL1_MR_DATA_4 (0x10UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000010 */
7729 #define DDRCTRL_MRCTRL1_MR_DATA_5 (0x20UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000020 */
7730 #define DDRCTRL_MRCTRL1_MR_DATA_6 (0x40UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000040 */
7731 #define DDRCTRL_MRCTRL1_MR_DATA_7 (0x80UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000080 */
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