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Searched refs:DDRCTRL_MRCTRL1_MR_DATA_2 (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h5897 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp151fxx_cm4.h6060 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp151axx_ca7.h5897 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp151axx_cm4.h5863 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp151dxx_cm4.h5863 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp151cxx_ca7.h6094 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp151cxx_cm4.h6060 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp151fxx_ca7.h6094 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp153axx_ca7.h7448 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp153axx_cm4.h7414 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp153cxx_ca7.h7645 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp153cxx_cm4.h7611 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp153dxx_ca7.h7448 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp153dxx_cm4.h7414 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp153fxx_ca7.h7645 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp153fxx_cm4.h7611 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp157axx_ca7.h7563 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp157axx_cm4.h7529 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp157cxx_ca7.h7760 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp157cxx_cm4.h7726 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp157dxx_ca7.h7563 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp157dxx_cm4.h7529 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp157fxx_ca7.h7760 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro
Dstm32mp157fxx_cm4.h7726 #define DDRCTRL_MRCTRL1_MR_DATA_2 (0x4UL << DDRCTRL_MRCTRL1_MR_DATA_Pos) /*!< 0x00000004 */ macro