Searched refs:DCMIPP_P0SR_VSYNCF_Pos (Results 1 – 8 of 8) sorted by relevance
4604 #define DCMIPP_P0SR_VSYNCF_Pos (2U) macro4605 #define DCMIPP_P0SR_VSYNCF_Msk (0x1UL << DCMIPP_P0SR_VSYNCF_Pos) /*!< 0x00000004 */
5128 #define DCMIPP_P0SR_VSYNCF_Pos (2U) macro5129 #define DCMIPP_P0SR_VSYNCF_Msk (0x1UL << DCMIPP_P0SR_VSYNCF_Pos) /*!< 0x00000004 */
5049 #define DCMIPP_P0SR_VSYNCF_Pos (2U) macro5050 #define DCMIPP_P0SR_VSYNCF_Msk (0x1UL << DCMIPP_P0SR_VSYNCF_Pos) /*!< 0x00000004 */
4681 #define DCMIPP_P0SR_VSYNCF_Pos (2U) macro4682 #define DCMIPP_P0SR_VSYNCF_Msk (0x1UL << DCMIPP_P0SR_VSYNCF_Pos) /*!< 0x00000004 */
9160 #define DCMIPP_P0SR_VSYNCF_Pos (2U) macro9161 #define DCMIPP_P0SR_VSYNCF_Msk (0x1UL << DCMIPP_P0SR_VSYNCF_Pos) /*!< 0…
10102 #define DCMIPP_P0SR_VSYNCF_Pos (2U) macro10103 #define DCMIPP_P0SR_VSYNCF_Msk (0x1UL << DCMIPP_P0SR_VSYNCF_Pos) /*!< 0…
9860 #define DCMIPP_P0SR_VSYNCF_Pos (2U) macro9861 #define DCMIPP_P0SR_VSYNCF_Msk (0x1UL << DCMIPP_P0SR_VSYNCF_Pos) /*!< 0…
9402 #define DCMIPP_P0SR_VSYNCF_Pos (2U) macro9403 #define DCMIPP_P0SR_VSYNCF_Msk (0x1UL << DCMIPP_P0SR_VSYNCF_Pos) /*!< 0…
