Searched refs:DCMIPP_P0DCLMTR_LIMIT_Pos (Results 1 – 10 of 10) sorted by relevance
1794 …WRITE_REG(hdcmipp->Instance->P0DCLMTR, (Limit << DCMIPP_P0DCLMTR_LIMIT_Pos) | DCMIPP_P0DCLMTR_ENAB… in HAL_DCMIPP_PIPE_EnableLimitEvent()
4123 …WRITE_REG(hdcmipp->Instance->P0DCLMTR, (Limit << DCMIPP_P0DCLMTR_LIMIT_Pos) | DCMIPP_P0DCLMTR_ENAB… in HAL_DCMIPP_PIPE_EnableLimitEvent()
4540 #define DCMIPP_P0DCLMTR_LIMIT_Pos (0U) macro4541 #define DCMIPP_P0DCLMTR_LIMIT_Msk (0xFFFFFFUL << DCMIPP_P0DCLMTR_LIMIT_Pos) /*!< 0x00FFFFFF */
5064 #define DCMIPP_P0DCLMTR_LIMIT_Pos (0U) macro5065 #define DCMIPP_P0DCLMTR_LIMIT_Msk (0xFFFFFFUL << DCMIPP_P0DCLMTR_LIMIT_Pos) /*!< 0x00FFFFFF */
4985 #define DCMIPP_P0DCLMTR_LIMIT_Pos (0U) macro4986 #define DCMIPP_P0DCLMTR_LIMIT_Msk (0xFFFFFFUL << DCMIPP_P0DCLMTR_LIMIT_Pos) /*!< 0x00FFFFFF */
4617 #define DCMIPP_P0DCLMTR_LIMIT_Pos (0U) macro4618 #define DCMIPP_P0DCLMTR_LIMIT_Msk (0xFFFFFFUL << DCMIPP_P0DCLMTR_LIMIT_Pos) /*!< 0x00FFFFFF */
9090 #define DCMIPP_P0DCLMTR_LIMIT_Pos (0U) macro9091 #define DCMIPP_P0DCLMTR_LIMIT_Msk (0xFFFFFFUL << DCMIPP_P0DCLMTR_LIMIT_Pos) /*!< 0…
10032 #define DCMIPP_P0DCLMTR_LIMIT_Pos (0U) macro10033 #define DCMIPP_P0DCLMTR_LIMIT_Msk (0xFFFFFFUL << DCMIPP_P0DCLMTR_LIMIT_Pos) /*!< 0…
9790 #define DCMIPP_P0DCLMTR_LIMIT_Pos (0U) macro9791 #define DCMIPP_P0DCLMTR_LIMIT_Msk (0xFFFFFFUL << DCMIPP_P0DCLMTR_LIMIT_Pos) /*!< 0…
9332 #define DCMIPP_P0DCLMTR_LIMIT_Pos (0U) macro9333 #define DCMIPP_P0DCLMTR_LIMIT_Msk (0xFFFFFFUL << DCMIPP_P0DCLMTR_LIMIT_Pos) /*!< 0…
