Searched refs:DCMIPP_P0DCLMTR_ENABLE (Results 1 – 10 of 10) sorted by relevance
1794 …TE_REG(hdcmipp->Instance->P0DCLMTR, (Limit << DCMIPP_P0DCLMTR_LIMIT_Pos) | DCMIPP_P0DCLMTR_ENABLE); in HAL_DCMIPP_PIPE_EnableLimitEvent()1826 CLEAR_BIT(hdcmipp->Instance->P0DCLMTR, DCMIPP_P0DCLMTR_ENABLE); in HAL_DCMIPP_PIPE_DisableLimitEvent()
4123 …TE_REG(hdcmipp->Instance->P0DCLMTR, (Limit << DCMIPP_P0DCLMTR_LIMIT_Pos) | DCMIPP_P0DCLMTR_ENABLE); in HAL_DCMIPP_PIPE_EnableLimitEvent()4155 CLEAR_BIT(hdcmipp->Instance->P0DCLMTR, DCMIPP_P0DCLMTR_ENABLE); in HAL_DCMIPP_PIPE_DisableLimitEvent()
4545 #define DCMIPP_P0DCLMTR_ENABLE DCMIPP_P0DCLMTR_ENABLE_Msk /*!< Enable */ macro
5069 #define DCMIPP_P0DCLMTR_ENABLE DCMIPP_P0DCLMTR_ENABLE_Msk /*!< Enable */ macro
4990 #define DCMIPP_P0DCLMTR_ENABLE DCMIPP_P0DCLMTR_ENABLE_Msk /*!< Enable */ macro
4622 #define DCMIPP_P0DCLMTR_ENABLE DCMIPP_P0DCLMTR_ENABLE_Msk /*!< Enable */ macro
9095 #define DCMIPP_P0DCLMTR_ENABLE DCMIPP_P0DCLMTR_ENABLE_Msk /*!< */ macro
10037 #define DCMIPP_P0DCLMTR_ENABLE DCMIPP_P0DCLMTR_ENABLE_Msk /*!< */ macro
9795 #define DCMIPP_P0DCLMTR_ENABLE DCMIPP_P0DCLMTR_ENABLE_Msk /*!< */ macro
9337 #define DCMIPP_P0DCLMTR_ENABLE DCMIPP_P0DCLMTR_ENABLE_Msk /*!< */ macro
