Searched refs:DCMIPP_P0CPPCR_BSM_Pos (Results 1 – 8 of 8) sorted by relevance
4674 #define DCMIPP_P0CPPCR_BSM_Pos (7U) macro4675 #define DCMIPP_P0CPPCR_BSM_Msk (0x3UL << DCMIPP_P0CPPCR_BSM_Pos) /*!< 0x00000180 */
5198 #define DCMIPP_P0CPPCR_BSM_Pos (7U) macro5199 #define DCMIPP_P0CPPCR_BSM_Msk (0x3UL << DCMIPP_P0CPPCR_BSM_Pos) /*!< 0x00000180 */
5119 #define DCMIPP_P0CPPCR_BSM_Pos (7U) macro5120 #define DCMIPP_P0CPPCR_BSM_Msk (0x3UL << DCMIPP_P0CPPCR_BSM_Pos) /*!< 0x00000180 */
4751 #define DCMIPP_P0CPPCR_BSM_Pos (7U) macro4752 #define DCMIPP_P0CPPCR_BSM_Msk (0x3UL << DCMIPP_P0CPPCR_BSM_Pos) /*!< 0x00000180 */
9256 #define DCMIPP_P0CPPCR_BSM_Pos (7U) macro9257 #define DCMIPP_P0CPPCR_BSM_Msk (0x3UL << DCMIPP_P0CPPCR_BSM_Pos) /*!< 0…
10198 #define DCMIPP_P0CPPCR_BSM_Pos (7U) macro10199 #define DCMIPP_P0CPPCR_BSM_Msk (0x3UL << DCMIPP_P0CPPCR_BSM_Pos) /*!< 0…
9956 #define DCMIPP_P0CPPCR_BSM_Pos (7U) macro9957 #define DCMIPP_P0CPPCR_BSM_Msk (0x3UL << DCMIPP_P0CPPCR_BSM_Pos) /*!< 0…
9498 #define DCMIPP_P0CPPCR_BSM_Pos (7U) macro9499 #define DCMIPP_P0CPPCR_BSM_Msk (0x3UL << DCMIPP_P0CPPCR_BSM_Pos) /*!< 0…