Searched refs:DCMIPP_CMSR1_PRHSYNC_Pos (Results 1 – 8 of 8) sorted by relevance
4440 #define DCMIPP_CMSR1_PRHSYNC_Pos (0U) macro4441 #define DCMIPP_CMSR1_PRHSYNC_Msk (0x1UL << DCMIPP_CMSR1_PRHSYNC_Pos) /*!< 0x00000001 */
4964 #define DCMIPP_CMSR1_PRHSYNC_Pos (0U) macro4965 #define DCMIPP_CMSR1_PRHSYNC_Msk (0x1UL << DCMIPP_CMSR1_PRHSYNC_Pos) /*!< 0x00000001 */
4885 #define DCMIPP_CMSR1_PRHSYNC_Pos (0U) macro4886 #define DCMIPP_CMSR1_PRHSYNC_Msk (0x1UL << DCMIPP_CMSR1_PRHSYNC_Pos) /*!< 0x00000001 */
4517 #define DCMIPP_CMSR1_PRHSYNC_Pos (0U) macro4518 #define DCMIPP_CMSR1_PRHSYNC_Msk (0x1UL << DCMIPP_CMSR1_PRHSYNC_Pos) /*!< 0x00000001 */
8906 #define DCMIPP_CMSR1_PRHSYNC_Pos (0U) macro8907 #define DCMIPP_CMSR1_PRHSYNC_Msk (0x1UL << DCMIPP_CMSR1_PRHSYNC_Pos) /*!< 0…
9848 #define DCMIPP_CMSR1_PRHSYNC_Pos (0U) macro9849 #define DCMIPP_CMSR1_PRHSYNC_Msk (0x1UL << DCMIPP_CMSR1_PRHSYNC_Pos) /*!< 0…
9606 #define DCMIPP_CMSR1_PRHSYNC_Pos (0U) macro9607 #define DCMIPP_CMSR1_PRHSYNC_Msk (0x1UL << DCMIPP_CMSR1_PRHSYNC_Pos) /*!< 0…
9148 #define DCMIPP_CMSR1_PRHSYNC_Pos (0U) macro9149 #define DCMIPP_CMSR1_PRHSYNC_Msk (0x1UL << DCMIPP_CMSR1_PRHSYNC_Pos) /*!< 0…
