Home
last modified time | relevance | path

Searched refs:DBPCR (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_pwr.c108 SET_BIT(PWR->DBPCR, PWR_DBPCR_DBP); in HAL_PWR_EnableBkUpAccess()
119 CLEAR_BIT(PWR->DBPCR, PWR_DBPCR_DBP); in HAL_PWR_DisableBkUpAccess()
Dstm32h5xx_hal_rcc.c750 if (HAL_IS_BIT_CLR(PWR->DBPCR, PWR_DBPCR_DBP)) in HAL_RCC_OscConfig()
753 SET_BIT(PWR->DBPCR, PWR_DBPCR_DBP); in HAL_RCC_OscConfig()
758 while (HAL_IS_BIT_CLR(PWR->DBPCR, PWR_DBPCR_DBP)) in HAL_RCC_OscConfig()
Dstm32h5xx_hal_rcc_ex.c1724 SET_BIT(PWR->DBPCR, PWR_DBPCR_DBP); in HAL_RCCEx_PeriphCLKConfig()
1729 while (HAL_IS_BIT_CLR(PWR->DBPCR, PWR_DBPCR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
5623 if (HAL_IS_BIT_CLR(PWR->DBPCR, PWR_DBPCR_DBP)) in HAL_RCCEx_EnableLSCO()
5646 if (HAL_IS_BIT_CLR(PWR->DBPCR, PWR_DBPCR_DBP)) in HAL_RCCEx_DisableLSCO()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_pwr.c197 WRITE_REG(PWR->DBPCR, PWR_DBPCR_DBP); in HAL_PWR_EnableBkUpAccess()
208 CLEAR_REG(PWR->DBPCR); in HAL_PWR_DisableBkUpAccess()
Dstm32n6xx_ll_pwr.c64 WRITE_REG(PWR->DBPCR, 0x00000000U); in LL_PWR_DeInit()
Dstm32n6xx_hal_rcc_ex.c162 SET_BIT(PWR->DBPCR, PWR_DBPCR_DBP); in HAL_RCCEx_PeriphCLKConfig()
165 if (READ_BIT(PWR->DBPCR, PWR_DBPCR_DBP) == 0U) in HAL_RCCEx_PeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_pwr.h584 SET_BIT(PWR->DBPCR, PWR_DBPCR_DBP); in LL_PWR_EnableBkUpAccess()
594 CLEAR_BIT(PWR->DBPCR, PWR_DBPCR_DBP); in LL_PWR_DisableBkUpAccess()
604 return ((READ_BIT(PWR->DBPCR, PWR_DBPCR_DBP) == (PWR_DBPCR_DBP)) ? 1UL : 0UL); in LL_PWR_IsEnabledBkUpAccess()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_pwr.h864 SET_BIT(PWR->DBPCR, PWR_DBPCR_DBP); in LL_PWR_EnableBkUpAccess()
874 CLEAR_BIT(PWR->DBPCR, PWR_DBPCR_DBP); in LL_PWR_DisableBkUpAccess()
884 return ((READ_BIT(PWR->DBPCR, PWR_DBPCR_DBP) == (PWR_DBPCR_DBP)) ? 1UL : 0UL); in LL_PWR_IsEnabledBkUpAccess()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h666 …__IO uint32_t DBPCR; /*!< DBP control register, Address offset: 0x24 … member
Dstm32h523xx.h829 …__IO uint32_t DBPCR; /*!< DBP control register, Address offset: 0x24 … member
Dstm32h562xx.h876 …__IO uint32_t DBPCR; /*!< DBP control register, Address offset: 0x24 … member
Dstm32h533xx.h893 …__IO uint32_t DBPCR; /*!< DBP control register, Address offset: 0x24 … member
Dstm32h573xx.h1118 …__IO uint32_t DBPCR; /*!< DBP control register, Address offset: 0x24 … member
Dstm32h563xx.h1054 …__IO uint32_t DBPCR; /*!< DBP control register, Address offset: 0x24 … member
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h1865 …__IO uint32_t DBPCR; /*!< PWR Disable backup protection control register Address offse… member
Dstm32n657xx.h1991 …__IO uint32_t DBPCR; /*!< PWR Disable backup protection control register Address offse… member
Dstm32n655xx.h1963 …__IO uint32_t DBPCR; /*!< PWR Disable backup protection control register Address offse… member
Dstm32n647xx.h1893 …__IO uint32_t DBPCR; /*!< PWR Disable backup protection control register Address offse… member