Searched refs:DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk (Results 1 – 6 of 6) sorted by relevance
3578 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Pos) macro3579 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk
4659 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Pos) macro4660 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk
5102 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Pos) macro5103 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk
5068 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Pos) macro5069 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk
5731 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Pos) macro5732 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk
5322 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Pos) macro5323 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH5_STOP_Msk