Searched refs:DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk (Results 1 – 6 of 6) sorted by relevance
3566 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Pos) macro3567 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk
4647 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Pos) macro4648 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk
5090 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Pos) macro5091 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk
5056 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Pos) macro5057 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk
5719 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Pos) macro5720 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk
5310 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Pos) macro5311 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH1_STOP_Msk