Searched refs:DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk (Results 1 – 6 of 6) sorted by relevance
3593 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Pos) macro3594 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk
4674 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Pos) macro4675 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk
5117 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Pos) macro5118 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk
5083 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Pos) macro5084 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk
5746 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Pos) macro5747 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk
5337 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Pos) macro5338 #define DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP DBGMCU_AHB1FZR_DBG_GPDMA2_CH10_STOP_Msk