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Searched refs:DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (Results 1 – 11 of 11) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2075 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (2U) macro
2076 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos)
Dstm32wba52xx.h2582 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (2U) macro
2583 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos)
Dstm32wba54xx.h2765 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (2U) macro
2766 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos)
Dstm32wba5mxx.h2765 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (2U) macro
2766 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos)
Dstm32wba55xx.h2765 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (2U) macro
2766 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos)
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3520 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (2U) macro
3521 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos)
Dstm32h523xx.h4601 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (2U) macro
4602 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos)
Dstm32h562xx.h5044 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (2U) macro
5045 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos)
Dstm32h533xx.h5010 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (2U) macro
5011 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos)
Dstm32h573xx.h5673 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (2U) macro
5674 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos)
Dstm32h563xx.h5264 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos (2U) macro
5265 #define DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Msk (0x1UL << DBGMCU_AHB1FZR_DBG_GPDMA1_CH2_STOP_Pos)