/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
D | stm32h7xx_hal_pwr.h | 266 MODIFY_REG(PWR->D3CR, PWR_D3CR_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); \ 268 tmpreg = READ_BIT(PWR->D3CR, PWR_D3CR_VOS); \ 281 MODIFY_REG(PWR->D3CR, PWR_D3CR_VOS, (__REGULATOR__)); \ 283 tmpreg = READ_BIT(PWR->D3CR, PWR_D3CR_VOS); \ 292 MODIFY_REG (PWR->D3CR, PWR_D3CR_VOS, (__REGULATOR__)); \ 294 tmpreg = READ_BIT(PWR->D3CR, PWR_D3CR_VOS); \ 382 ((__FLAG__) == PWR_FLAG_VOSRDY) ? ((PWR->D3CR & PWR_D3CR_VOSRDY) == PWR_D3CR_VOSRDY) :\ 407 ((__FLAG__) == PWR_FLAG_VOSRDY) ? ((PWR->D3CR & PWR_D3CR_VOSRDY) == PWR_D3CR_VOSRDY) :\ 424 ((__FLAG__) == PWR_FLAG_VOSRDY) ? ((PWR->D3CR & PWR_D3CR_VOSRDY) == PWR_D3CR_VOSRDY) :\
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D | stm32h7xx_ll_pwr.h | 1578 MODIFY_REG(PWR->D3CR, PWR_D3CR_VOS, VoltageScaling); in LL_PWR_SetRegulVoltageScaling() 1598 return (uint32_t)(READ_BIT(PWR->D3CR, PWR_D3CR_VOS)); in LL_PWR_GetRegulVoltageScaling() 2111 return ((READ_BIT(PWR->D3CR, PWR_D3CR_VOSRDY) == (PWR_D3CR_VOSRDY)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_VOS()
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
D | stm32h7xx_hal_pwr_ex.c | 441 MODIFY_REG (PWR->D3CR, PWR_D3CR_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); in HAL_PWREx_ControlVoltageScaling() 488 MODIFY_REG (PWR->D3CR, PWR_D3CR_VOS, VoltageScaling); in HAL_PWREx_ControlVoltageScaling() 492 MODIFY_REG(PWR->D3CR, PWR_D3CR_VOS, VoltageScaling); in HAL_PWREx_ControlVoltageScaling()
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/hal_stm32-latest/stm32cube/stm32h7xx/soc/ |
D | stm32h730xxq.h | 1225 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h733xx.h | 1224 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h725xx.h | 1222 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h730xx.h | 1224 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h735xx.h | 1225 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h742xx.h | 1131 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h723xx.h | 1221 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h750xx.h | 1219 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h753xx.h | 1219 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h745xx.h | 1264 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h745xg.h | 1264 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h743xx.h | 1218 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h755xx.h | 1265 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h757xx.h | 1346 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h747xg.h | 1345 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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D | stm32h747xx.h | 1345 __IO uint32_t D3CR; /*!< PWR D3 domain control register, Address offset: 0x18 */ member
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