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Searched refs:CRYP_SET_PHASE (Results 1 – 15 of 15) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_cryp.c322 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~CRYP_CR… macro
329 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~AES_CR_… macro
3713 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3804 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3812 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3915 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
3999 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
4013 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
4114 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process_IT()
4192 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_cryp.c322 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~CRYP_CR… macro
329 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~AES_CR_… macro
3719 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3810 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3818 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3921 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
4005 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
4019 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
4120 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process_IT()
4198 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
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/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_cryp.c318 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~CRYP_CR… macro
3184 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3241 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3410 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
3447 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
3506 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
3559 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process_DMA()
3723 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
3786 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESCCM_Process()
3956 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT()
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/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_cryp.c357 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR,\ macro
2589 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt()
3126 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3167 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3352 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
3392 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
3691 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
3800 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
4012 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT()
4052 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT()
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/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_cryp.c357 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR,\ macro
2591 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt()
3128 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3169 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3354 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
3394 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
3693 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
3802 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
4014 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT()
4054 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT()
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/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_cryp.c357 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR,\ macro
2589 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt()
3126 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3167 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3352 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
3392 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
3691 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
3800 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
4012 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT()
4052 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT()
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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_cryp.c357 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR,\ macro
2589 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt()
3126 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3167 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3352 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
3392 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
3691 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
3800 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
4012 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT()
4052 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT()
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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_cryp.c357 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR,\ macro
2589 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt()
3126 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3167 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3352 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
3392 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
3691 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
3800 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
4012 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT()
4052 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT()
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_cryp.c320 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~CRYP_CR… macro
2947 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3010 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3233 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
3271 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
3330 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
3389 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process_DMA()
3557 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
3669 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESCCM_Process()
3854 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT()
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/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_cryp.c353 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_GCMPH… macro
2742 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt()
3275 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3316 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3499 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
3540 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
3837 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
3947 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
4157 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT()
4198 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_cryp.c344 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__)\ macro
3107 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt()
3751 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3788 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
3966 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
4006 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
4304 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
4412 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
4614 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT()
4657 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_cryp.c344 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__)\ macro
3136 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt()
3780 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3853 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
4031 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
4103 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
4401 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
4541 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
4779 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT()
4854 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT()
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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_cryp.c344 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__)\ macro
3229 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt()
3850 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
3927 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
4105 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
4181 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
4479 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
4623 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
4865 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT()
4944 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT()
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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_cryp.c335 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{MODIFY_REG(((CRYP_TypeDef *)((__HANDLE__)->Instan… macro
4173 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
4283 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
4581 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
4698 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
4958 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
5027 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
5126 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process_DMA()
5381 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
5500 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESCCM_Process()
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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_cryp.c335 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{MODIFY_REG(((CRYP_TypeDef *)((__HANDLE__)->Instan… macro
4157 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process()
4267 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process()
4565 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT()
4682 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
4939 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT()
5008 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA()
5107 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process_DMA()
5362 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process()
5481 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESCCM_Process()
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