1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_cryp.h 4 * @author MCD Application Team 5 * @brief Header file of CRYP HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 ****************************************************************************** 16 */ 17 18 /* Define to prevent recursive inclusion -------------------------------------*/ 19 #ifndef STM32L4xx_HAL_CRYP_H 20 #define STM32L4xx_HAL_CRYP_H 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "stm32l4xx_hal_def.h" 28 29 /** @addtogroup STM32L4xx_HAL_Driver 30 * @{ 31 */ 32 33 #if defined(AES) 34 35 /** @addtogroup CRYP 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup CRYP_Exported_Types CRYP Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief CRYP Configuration Structure definition 46 */ 47 typedef struct 48 { 49 uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string. 50 This parameter can be a value of @ref CRYP_Data_Type */ 51 52 uint32_t KeySize; /*!< 128 or 256-bit key length. 53 This parameter can be a value of @ref CRYP_Key_Size */ 54 55 uint32_t OperatingMode; /*!< AES operating mode. 56 This parameter can be a value of @ref CRYP_AES_OperatingMode */ 57 58 uint32_t ChainingMode; /*!< AES chaining mode. 59 This parameter can be a value of @ref CRYP_AES_ChainingMode */ 60 61 uint32_t KeyWriteFlag; /*!< Allows to bypass or not key write-up before decryption. 62 This parameter can be a value of @ref CRYP_Key_Write */ 63 64 uint32_t GCMCMACPhase; /*!< Indicates the processing phase of the Galois Counter Mode (GCM), 65 Galois Message Authentication Code (GMAC), Cipher Message 66 Authentication Code (CMAC) (when applicable) or Counter with Cipher 67 Mode (CCM) (when applicable). 68 This parameter can be a value of @ref CRYP_GCM_CMAC_Phase */ 69 70 uint8_t* pKey; /*!< Encryption/Decryption Key */ 71 72 uint8_t* pInitVect; /*!< Initialization Vector used for CTR, CBC, GCM/GMAC, CMAC (when applicable) 73 and CCM (when applicable) modes */ 74 75 uint8_t* Header; /*!< Header used in GCM/GMAC, CMAC (when applicable) and CCM (when applicable) modes */ 76 77 uint64_t HeaderSize; /*!< Header size in bytes */ 78 79 }CRYP_InitTypeDef; 80 81 /** 82 * @brief HAL CRYP State structures definition 83 */ 84 typedef enum 85 { 86 HAL_CRYP_STATE_RESET = 0x00, /*!< CRYP not yet initialized or disabled */ 87 HAL_CRYP_STATE_READY = 0x01, /*!< CRYP initialized and ready for use */ 88 HAL_CRYP_STATE_BUSY = 0x02, /*!< CRYP internal processing is ongoing */ 89 HAL_CRYP_STATE_TIMEOUT = 0x03, /*!< CRYP timeout state */ 90 HAL_CRYP_STATE_ERROR = 0x04, /*!< CRYP error state */ 91 HAL_CRYP_STATE_SUSPENDED = 0x05 /*!< CRYP suspended */ 92 }HAL_CRYP_STATETypeDef; 93 94 /** 95 * @brief HAL CRYP phase structures definition 96 */ 97 typedef enum 98 { 99 HAL_CRYP_PHASE_READY = 0x01, /*!< CRYP peripheral is ready for initialization. */ 100 HAL_CRYP_PHASE_PROCESS = 0x02, /*!< CRYP peripheral is in processing phase */ 101 HAL_CRYP_PHASE_START = 0x03, /*!< CRYP peripheral has been initialized but 102 GCM/GMAC(/CMAC)(/CCM) initialization phase has not started */ 103 HAL_CRYP_PHASE_INIT_OVER = 0x04, /*!< GCM/GMAC(/CMAC)(/CCM) init phase has been carried out */ 104 HAL_CRYP_PHASE_HEADER_OVER = 0x05, /*!< GCM/GMAC(/CMAC)(/CCM) header phase has been carried out */ 105 HAL_CRYP_PHASE_PAYLOAD_OVER = 0x06, /*!< GCM(/CCM) payload phase has been carried out */ 106 HAL_CRYP_PHASE_FINAL_OVER = 0x07, /*!< GCM/GMAC(/CMAC)(/CCM) final phase has been carried out */ 107 HAL_CRYP_PHASE_HEADER_SUSPENDED = 0x08, /*!< GCM/GMAC(/CMAC)(/CCM) header phase has been suspended */ 108 HAL_CRYP_PHASE_PAYLOAD_SUSPENDED = 0x09, /*!< GCM(/CCM) payload phase has been suspended */ 109 HAL_CRYP_PHASE_NOT_USED = 0x0a /*!< Phase is irrelevant to the current chaining mode */ 110 }HAL_PhaseTypeDef; 111 112 /** 113 * @brief HAL CRYP mode suspend definitions 114 */ 115 typedef enum 116 { 117 HAL_CRYP_SUSPEND_NONE = 0x00, /*!< CRYP peripheral suspension not requested */ 118 HAL_CRYP_SUSPEND = 0x01 /*!< CRYP peripheral suspension requested */ 119 }HAL_SuspendTypeDef; 120 121 122 /** 123 * @brief HAL CRYP Error Codes definition 124 */ 125 #define HAL_CRYP_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ 126 #define HAL_CRYP_WRITE_ERROR ((uint32_t)0x00000001) /*!< Write error */ 127 #define HAL_CRYP_READ_ERROR ((uint32_t)0x00000002) /*!< Read error */ 128 #define HAL_CRYP_DMA_ERROR ((uint32_t)0x00000004) /*!< DMA error */ 129 #define HAL_CRYP_BUSY_ERROR ((uint32_t)0x00000008) /*!< Busy flag error */ 130 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 131 #define HAL_CRYP_ERROR_INVALID_CALLBACK ((uint32_t)0x00000010U) /*!< Invalid Callback error */ 132 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 133 134 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 135 /** 136 * @brief HAL CRYP common Callback ID enumeration definition 137 */ 138 typedef enum 139 { 140 HAL_CRYP_INPUTCPLT_CB_ID = 0x01U, /*!< CRYP input DMA transfer completion callback ID */ 141 HAL_CRYP_OUTPUTCPLT_CB_ID = 0x02U, /*!< CRYP output DMA transfer completion callback ID */ 142 HAL_CRYP_COMPCPLT_CB_ID = 0x03U, /*!< CRYP computation completion callback ID */ 143 HAL_CRYP_ERROR_CB_ID = 0x04U, /*!< CRYP error callback ID */ 144 HAL_CRYP_MSPINIT_CB_ID = 0x05U, /*!< CRYP MspInit callback ID */ 145 HAL_CRYP_MSPDEINIT_CB_ID = 0x06U, /*!< CRYP MspDeInit callback ID */ 146 }HAL_CRYP_CallbackIDTypeDef; 147 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 148 149 /** 150 * @brief CRYP handle Structure definition 151 */ 152 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 153 typedef struct __CRYP_HandleTypeDef 154 #else 155 typedef struct 156 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 157 { 158 AES_TypeDef *Instance; /*!< Register base address */ 159 160 CRYP_InitTypeDef Init; /*!< CRYP initialization parameters */ 161 162 uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) input buffer */ 163 164 uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) output buffer */ 165 166 uint32_t CrypInCount; /*!< Input data size in bytes or, after suspension, the remaining 167 number of bytes to process */ 168 169 uint32_t CrypOutCount; /*!< Output data size in bytes */ 170 171 HAL_PhaseTypeDef Phase; /*!< CRYP peripheral processing phase for GCM, GMAC, CMAC (when applicable) 172 or CCM (when applicable) modes. 173 Indicates the last phase carried out to ease 174 phase transitions */ 175 176 DMA_HandleTypeDef *hdmain; /*!< CRYP peripheral Input DMA handle parameters */ 177 178 DMA_HandleTypeDef *hdmaout; /*!< CRYP peripheral Output DMA handle parameters */ 179 180 HAL_LockTypeDef Lock; /*!< CRYP locking object */ 181 182 __IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */ 183 184 __IO uint32_t ErrorCode; /*!< CRYP peripheral error code */ 185 186 HAL_SuspendTypeDef SuspendRequest; /*!< CRYP peripheral suspension request flag */ 187 188 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 189 void (* InCpltCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP input DMA transfer completion callback */ 190 191 void (* OutCpltCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP output DMA transfer completion callback */ 192 193 void (* CompCpltCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP computation completion callback */ 194 195 void (* ErrorCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP error callback */ 196 197 void (* MspInitCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP Msp Init callback */ 198 199 void (* MspDeInitCallback)( struct __CRYP_HandleTypeDef * hcryp); /*!< CRYP Msp DeInit callback */ 200 201 #endif /* (USE_HAL_CRYP_REGISTER_CALLBACKS) */ 202 }CRYP_HandleTypeDef; 203 204 205 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 206 /** 207 * @brief HAL CRYP Callback pointer definition 208 */ 209 typedef void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef * hcryp); /*!< pointer to a CRYP common callback functions */ 210 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 211 /** 212 * @} 213 */ 214 215 216 /* Exported constants --------------------------------------------------------*/ 217 /** @defgroup CRYP_Exported_Constants CRYP Exported Constants 218 * @{ 219 */ 220 221 /** @defgroup CRYP_Key_Size Key size selection 222 * @{ 223 */ 224 #define CRYP_KEYSIZE_128B ((uint32_t)0x00000000) /*!< 128-bit long key */ 225 #define CRYP_KEYSIZE_256B AES_CR_KEYSIZE /*!< 256-bit long key */ 226 /** 227 * @} 228 */ 229 230 /** @defgroup CRYP_Data_Type AES Data Type selection 231 * @{ 232 */ 233 #define CRYP_DATATYPE_32B ((uint32_t)0x00000000) /*!< 32-bit data type (no swapping) */ 234 #define CRYP_DATATYPE_16B AES_CR_DATATYPE_0 /*!< 16-bit data type (half-word swapping) */ 235 #define CRYP_DATATYPE_8B AES_CR_DATATYPE_1 /*!< 8-bit data type (byte swapping) */ 236 #define CRYP_DATATYPE_1B AES_CR_DATATYPE /*!< 1-bit data type (bit swapping) */ 237 /** 238 * @} 239 */ 240 241 /** @defgroup CRYP_AES_State AES Enable state 242 * @{ 243 */ 244 #define CRYP_AES_DISABLE ((uint32_t)0x00000000) /*!< Disable AES */ 245 #define CRYP_AES_ENABLE AES_CR_EN /*!< Enable AES */ 246 /** 247 * @} 248 */ 249 250 /** @defgroup CRYP_AES_OperatingMode AES operating mode 251 * @{ 252 */ 253 #define CRYP_ALGOMODE_ENCRYPT ((uint32_t)0x00000000) /*!< Encryption mode */ 254 #define CRYP_ALGOMODE_KEYDERIVATION AES_CR_MODE_0 /*!< Key derivation mode */ 255 #define CRYP_ALGOMODE_DECRYPT AES_CR_MODE_1 /*!< Decryption */ 256 #define CRYP_ALGOMODE_KEYDERIVATION_DECRYPT AES_CR_MODE /*!< Key derivation and decryption */ 257 #define CRYP_ALGOMODE_TAG_GENERATION ((uint32_t)0x00000000) /*!< GMAC or CMAC (when applicable) authentication tag generation */ 258 /** 259 * @} 260 */ 261 262 /** @defgroup CRYP_AES_ChainingMode AES chaining mode 263 * @{ 264 */ 265 #define CRYP_CHAINMODE_AES_ECB ((uint32_t)0x00000000) /*!< Electronic codebook chaining algorithm */ 266 #define CRYP_CHAINMODE_AES_CBC AES_CR_CHMOD_0 /*!< Cipher block chaining algorithm */ 267 #define CRYP_CHAINMODE_AES_CTR AES_CR_CHMOD_1 /*!< Counter mode chaining algorithm */ 268 #define CRYP_CHAINMODE_AES_GCM_GMAC (AES_CR_CHMOD_0 | AES_CR_CHMOD_1) /*!< Galois counter mode - Galois message authentication code */ 269 #if defined(AES_CR_NPBLB) 270 #define CRYP_CHAINMODE_AES_CCM AES_CR_CHMOD_2 /*!< Counter with Cipher Mode */ 271 #else 272 #define CRYP_CHAINMODE_AES_CMAC AES_CR_CHMOD_2 /*!< Cipher message authentication code */ 273 #endif 274 /** 275 * @} 276 */ 277 278 /** @defgroup CRYP_Key_Write AES decryption key write-up flag 279 * @{ 280 */ 281 #define CRYP_KEY_WRITE_ENABLE ((uint32_t)0x00000000) /*!< Enable decryption key writing */ 282 #define CRYP_KEY_WRITE_DISABLE ((uint32_t)0x00000001) /*!< Disable decryption key writing */ 283 /** 284 * @} 285 */ 286 287 /** @defgroup CRYP_DMAIN DMA Input phase management enable state 288 * @{ 289 */ 290 #define CRYP_DMAIN_DISABLE ((uint32_t)0x00000000) /*!< Disable DMA Input phase management */ 291 #define CRYP_DMAIN_ENABLE AES_CR_DMAINEN /*!< Enable DMA Input phase management */ 292 /** 293 * @} 294 */ 295 296 /** @defgroup CRYP_DMAOUT DMA Output phase management enable state 297 * @{ 298 */ 299 #define CRYP_DMAOUT_DISABLE ((uint32_t)0x00000000) /*!< Disable DMA Output phase management */ 300 #define CRYP_DMAOUT_ENABLE AES_CR_DMAOUTEN /*!< Enable DMA Output phase management */ 301 /** 302 * @} 303 */ 304 305 306 /** @defgroup CRYP_GCM_CMAC_Phase GCM/GMAC and CCM/CMAC (when applicable) processing phase selection 307 * @{ 308 */ 309 #define CRYP_GCM_INIT_PHASE ((uint32_t)0x00000000) /*!< GCM/GMAC (or CCM) init phase */ 310 #define CRYP_GCMCMAC_HEADER_PHASE AES_CR_GCMPH_0 /*!< GCM/GMAC/CCM/CMAC header phase */ 311 #define CRYP_GCM_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< GCM/CCM payload phase */ 312 #define CRYP_GCMCMAC_FINAL_PHASE AES_CR_GCMPH /*!< GCM/GMAC/CCM/CMAC final phase */ 313 /* Definitions duplication for code readibility's sake: 314 supported or not supported chain modes are not specified for each phase */ 315 #define CRYP_INIT_PHASE ((uint32_t)0x00000000) /*!< Init phase */ 316 #define CRYP_HEADER_PHASE AES_CR_GCMPH_0 /*!< Header phase */ 317 #define CRYP_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< Payload phase */ 318 #define CRYP_FINAL_PHASE AES_CR_GCMPH /*!< Final phase */ 319 /** 320 * @} 321 */ 322 323 /** @defgroup CRYP_Flags AES status flags 324 * @{ 325 */ 326 327 #define CRYP_FLAG_BUSY AES_SR_BUSY /*!< GCM process suspension forbidden */ 328 #define CRYP_FLAG_WRERR AES_SR_WRERR /*!< Write Error */ 329 #define CRYP_FLAG_RDERR AES_SR_RDERR /*!< Read error */ 330 #define CRYP_FLAG_CCF AES_SR_CCF /*!< Computation completed */ 331 /** 332 * @} 333 */ 334 335 /** @defgroup CRYP_Clear_Flags AES clearing flags 336 * @{ 337 */ 338 339 #define CRYP_CCF_CLEAR AES_CR_CCFC /*!< Computation Complete Flag Clear */ 340 #define CRYP_ERR_CLEAR AES_CR_ERRC /*!< Error Flag Clear */ 341 /** 342 * @} 343 */ 344 345 /** @defgroup AES_Interrupts_Enable AES Interrupts Enable bits 346 * @{ 347 */ 348 #define CRYP_IT_CCFIE AES_CR_CCFIE /*!< Computation Complete interrupt enable */ 349 #define CRYP_IT_ERRIE AES_CR_ERRIE /*!< Error interrupt enable */ 350 /** 351 * @} 352 */ 353 354 /** @defgroup CRYP_Interrupts_Flags AES Interrupts flags 355 * @{ 356 */ 357 #define CRYP_IT_WRERR AES_SR_WRERR /*!< Write Error */ 358 #define CRYP_IT_RDERR AES_SR_RDERR /*!< Read Error */ 359 #define CRYP_IT_CCF AES_SR_CCF /*!< Computation completed */ 360 /** 361 * @} 362 */ 363 364 /** 365 * @} 366 */ 367 368 /* Exported macros -----------------------------------------------------------*/ 369 /** @defgroup CRYP_Exported_Macros CRYP Exported Macros 370 * @{ 371 */ 372 373 /** @brief Reset CRYP handle state. 374 * @param __HANDLE__ specifies the CRYP handle. 375 * @retval None 376 */ 377 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 378 #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) do{\ 379 (__HANDLE__)->State = HAL_CRYP_STATE_RESET;\ 380 (__HANDLE__)->MspInitCallback = NULL; \ 381 (__HANDLE__)->MspDeInitCallback = NULL; \ 382 }while(0) 383 #else 384 #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET) 385 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 386 387 /** 388 * @brief Enable the CRYP AES peripheral. 389 * @param __HANDLE__ specifies the CRYP handle. 390 * @retval None 391 */ 392 #define __HAL_CRYP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= AES_CR_EN) 393 394 /** 395 * @brief Disable the CRYP AES peripheral. 396 * @param __HANDLE__ specifies the CRYP handle. 397 * @retval None 398 */ 399 #define __HAL_CRYP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~AES_CR_EN) 400 401 /** 402 * @brief Set the algorithm operating mode. 403 * @param __HANDLE__ specifies the CRYP handle. 404 * @param __OPERATING_MODE__ specifies the operating mode 405 * This parameter can be one of the following values: 406 * @arg @ref CRYP_ALGOMODE_ENCRYPT encryption 407 * @arg @ref CRYP_ALGOMODE_KEYDERIVATION key derivation 408 * @arg @ref CRYP_ALGOMODE_DECRYPT decryption 409 * @arg @ref CRYP_ALGOMODE_KEYDERIVATION_DECRYPT key derivation and decryption 410 * @retval None 411 */ 412 #define __HAL_CRYP_SET_OPERATINGMODE(__HANDLE__, __OPERATING_MODE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_MODE, (__OPERATING_MODE__)) 413 414 415 /** 416 * @brief Set the algorithm chaining mode. 417 * @param __HANDLE__ specifies the CRYP handle. 418 * @param __CHAINING_MODE__ specifies the chaining mode 419 * This parameter can be one of the following values: 420 * @arg @ref CRYP_CHAINMODE_AES_ECB Electronic CodeBook 421 * @arg @ref CRYP_CHAINMODE_AES_CBC Cipher Block Chaining 422 * @arg @ref CRYP_CHAINMODE_AES_CTR CounTeR mode 423 * @arg @ref CRYP_CHAINMODE_AES_GCM_GMAC Galois Counter Mode or Galois Message Authentication Code 424 * @arg @ref CRYP_CHAINMODE_AES_CMAC Cipher Message Authentication Code (or Counter with Cipher Mode when applicable) 425 * @retval None 426 */ 427 #define __HAL_CRYP_SET_CHAININGMODE(__HANDLE__, __CHAINING_MODE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_CHMOD, (__CHAINING_MODE__)) 428 429 430 431 /** @brief Check whether the specified CRYP status flag is set or not. 432 * @param __HANDLE__ specifies the CRYP handle. 433 * @param __FLAG__ specifies the flag to check. 434 * This parameter can be one of the following values: 435 * @arg @ref CRYP_FLAG_BUSY GCM process suspension forbidden 436 * @arg @ref CRYP_IT_WRERR Write Error 437 * @arg @ref CRYP_IT_RDERR Read Error 438 * @arg @ref CRYP_IT_CCF Computation Complete 439 * @retval The state of __FLAG__ (TRUE or FALSE). 440 */ 441 #define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) 442 443 444 /** @brief Clear the CRYP pending status flag. 445 * @param __HANDLE__ specifies the CRYP handle. 446 * @param __FLAG__ specifies the flag to clear. 447 * This parameter can be one of the following values: 448 * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear 449 * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear 450 * @retval None 451 */ 452 #define __HAL_CRYP_CLEAR_FLAG(__HANDLE__, __FLAG__) SET_BIT((__HANDLE__)->Instance->CR, (__FLAG__)) 453 454 455 456 /** @brief Check whether the specified CRYP interrupt source is enabled or not. 457 * @param __HANDLE__ specifies the CRYP handle. 458 * @param __INTERRUPT__ CRYP interrupt source to check 459 * This parameter can be one of the following values: 460 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) 461 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt 462 * @retval State of interruption (TRUE or FALSE). 463 */ 464 #define __HAL_CRYP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) 465 466 467 /** @brief Check whether the specified CRYP interrupt is set or not. 468 * @param __HANDLE__ specifies the CRYP handle. 469 * @param __INTERRUPT__ specifies the interrupt to check. 470 * This parameter can be one of the following values: 471 * @arg @ref CRYP_IT_WRERR Write Error 472 * @arg @ref CRYP_IT_RDERR Read Error 473 * @arg @ref CRYP_IT_CCF Computation Complete 474 * @retval The state of __INTERRUPT__ (TRUE or FALSE). 475 */ 476 #define __HAL_CRYP_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__)) 477 478 479 480 /** @brief Clear the CRYP pending interrupt. 481 * @param __HANDLE__ specifies the CRYP handle. 482 * @param __INTERRUPT__ specifies the IT to clear. 483 * This parameter can be one of the following values: 484 * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear 485 * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear 486 * @retval None 487 */ 488 #define __HAL_CRYP_CLEAR_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) 489 490 491 /** 492 * @brief Enable the CRYP interrupt. 493 * @param __HANDLE__ specifies the CRYP handle. 494 * @param __INTERRUPT__ CRYP Interrupt. 495 * This parameter can be one of the following values: 496 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) 497 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt 498 * @retval None 499 */ 500 #define __HAL_CRYP_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 501 502 503 /** 504 * @brief Disable the CRYP interrupt. 505 * @param __HANDLE__ specifies the CRYP handle. 506 * @param __INTERRUPT__ CRYP Interrupt. 507 * This parameter can be one of the following values: 508 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR) 509 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt 510 * @retval None 511 */ 512 #define __HAL_CRYP_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 513 514 /** 515 * @} 516 */ 517 518 /* Private macros --------------------------------------------------------*/ 519 /** @addtogroup CRYP_Private_Macros CRYP Private Macros 520 * @{ 521 */ 522 523 /** 524 * @brief Verify the key size length. 525 * @param __KEYSIZE__ Ciphering/deciphering algorithm key size. 526 * @retval SET (__KEYSIZE__ is a valid value) or RESET (__KEYSIZE__ is invalid) 527 */ 528 #define IS_CRYP_KEYSIZE(__KEYSIZE__) (((__KEYSIZE__) == CRYP_KEYSIZE_128B) || \ 529 ((__KEYSIZE__) == CRYP_KEYSIZE_256B)) 530 531 /** 532 * @brief Verify the input data type. 533 * @param __DATATYPE__ Ciphering/deciphering algorithm input data type. 534 * @retval SET (__DATATYPE__ is valid) or RESET (__DATATYPE__ is invalid) 535 */ 536 #define IS_CRYP_DATATYPE(__DATATYPE__) (((__DATATYPE__) == CRYP_DATATYPE_32B) || \ 537 ((__DATATYPE__) == CRYP_DATATYPE_16B) || \ 538 ((__DATATYPE__) == CRYP_DATATYPE_8B) || \ 539 ((__DATATYPE__) == CRYP_DATATYPE_1B)) 540 541 /** 542 * @brief Verify the CRYP AES IP running mode. 543 * @param __MODE__ CRYP AES IP running mode. 544 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 545 */ 546 #define IS_CRYP_AES(__MODE__) (((__MODE__) == CRYP_AES_DISABLE) || \ 547 ((__MODE__) == CRYP_AES_ENABLE)) 548 549 /** 550 * @brief Verify the selected CRYP algorithm. 551 * @param __ALGOMODE__ Selected CRYP algorithm (ciphering, deciphering, key derivation or a combination of the latter). 552 * @retval SET (__ALGOMODE__ is valid) or RESET (__ALGOMODE__ is invalid) 553 */ 554 #define IS_CRYP_ALGOMODE(__ALGOMODE__) (((__ALGOMODE__) == CRYP_ALGOMODE_ENCRYPT) || \ 555 ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION) || \ 556 ((__ALGOMODE__) == CRYP_ALGOMODE_DECRYPT) || \ 557 ((__ALGOMODE__) == CRYP_ALGOMODE_TAG_GENERATION) || \ 558 ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT)) 559 560 /** 561 * @brief Verify the selected CRYP chaining algorithm. 562 * @param __CHAINMODE__ Selected CRYP chaining algorithm. 563 * @retval SET (__CHAINMODE__ is valid) or RESET (__CHAINMODE__ is invalid) 564 */ 565 #if defined(AES_CR_NPBLB) 566 #define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \ 567 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \ 568 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \ 569 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \ 570 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CCM)) 571 #else 572 #define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \ 573 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \ 574 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \ 575 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \ 576 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CMAC)) 577 #endif 578 579 /** 580 * @brief Verify the deciphering key write option. 581 * @param __WRITE__ deciphering key write option. 582 * @retval SET (__WRITE__ is valid) or RESET (__WRITE__ is invalid) 583 */ 584 #define IS_CRYP_WRITE(__WRITE__) (((__WRITE__) == CRYP_KEY_WRITE_ENABLE) || \ 585 ((__WRITE__) == CRYP_KEY_WRITE_DISABLE)) 586 587 /** 588 * @brief Verify the CRYP input data DMA mode. 589 * @param __MODE__ CRYP input data DMA mode. 590 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 591 */ 592 #define IS_CRYP_DMAIN(__MODE__) (((__MODE__) == CRYP_DMAIN_DISABLE) || \ 593 ((__MODE__) == CRYP_DMAIN_ENABLE)) 594 595 /** 596 * @brief Verify the CRYP output data DMA mode. 597 * @param __MODE__ CRYP output data DMA mode. 598 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 599 */ 600 #define IS_CRYP_DMAOUT(__MODE__) (((__MODE__) == CRYP_DMAOUT_DISABLE) || \ 601 ((__MODE__) == CRYP_DMAOUT_ENABLE)) 602 603 /** 604 * @brief Verify the CRYP AES ciphering/deciphering/authentication algorithm phase. 605 * @param __PHASE__ CRYP AES ciphering/deciphering/authentication algorithm phase. 606 * @retval SET (__PHASE__ is valid) or RESET (__PHASE__ is invalid) 607 */ 608 #define IS_CRYP_GCMCMAC_PHASE(__PHASE__) (((__PHASE__) == CRYP_INIT_PHASE) || \ 609 ((__PHASE__) == CRYP_HEADER_PHASE) || \ 610 ((__PHASE__) == CRYP_PAYLOAD_PHASE) || \ 611 ((__PHASE__) == CRYP_FINAL_PHASE)) 612 613 /** 614 * @} 615 */ 616 617 /* Include CRYP HAL Extended module */ 618 #include "stm32l4xx_hal_cryp_ex.h" 619 620 /* Exported functions --------------------------------------------------------*/ 621 /** @addtogroup CRYP_Exported_Functions CRYP Exported Functions 622 * @{ 623 */ 624 625 /** @addtogroup CRYP_Exported_Functions_Group1 Initialization and deinitialization functions 626 * @{ 627 */ 628 629 /* Initialization/de-initialization functions ********************************/ 630 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp); 631 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp); 632 633 /* MSP initialization/de-initialization functions ****************************/ 634 void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp); 635 void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp); 636 637 /** 638 * @} 639 */ 640 641 /** @addtogroup CRYP_Exported_Functions_Group2 AES processing functions 642 * @{ 643 */ 644 645 /* AES encryption/decryption processing functions ****************************/ 646 647 /* AES encryption/decryption using polling ***********************************/ 648 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); 649 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); 650 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); 651 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); 652 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); 653 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); 654 655 /* AES encryption/decryption using interrupt *********************************/ 656 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 657 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 658 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 659 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 660 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 661 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 662 663 /* AES encryption/decryption using DMA ***************************************/ 664 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 665 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 666 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 667 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 668 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); 669 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); 670 671 /** 672 * @} 673 */ 674 675 /** @addtogroup CRYP_Exported_Functions_Group3 Callback functions 676 * @{ 677 */ 678 /* CallBack functions ********************************************************/ 679 void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp); 680 void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp); 681 void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp); 682 /* Callbacks Register/UnRegister functions ***********************************/ 683 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1) 684 HAL_StatusTypeDef HAL_CRYP_RegisterCallback(CRYP_HandleTypeDef *hcryp, HAL_CRYP_CallbackIDTypeDef CallbackID, pCRYP_CallbackTypeDef pCallback); 685 HAL_StatusTypeDef HAL_CRYP_UnRegisterCallback(CRYP_HandleTypeDef *hcryp, HAL_CRYP_CallbackIDTypeDef CallbackID); 686 #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ 687 688 /** 689 * @} 690 */ 691 692 /** @addtogroup CRYP_Exported_Functions_Group4 CRYP IRQ handler 693 * @{ 694 */ 695 696 /* AES interrupt handling function *******************************************/ 697 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp); 698 699 /** 700 * @} 701 */ 702 703 /** @addtogroup CRYP_Exported_Functions_Group5 Peripheral State functions 704 * @{ 705 */ 706 707 /* Peripheral State functions ************************************************/ 708 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp); 709 uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp); 710 711 /** 712 * @} 713 */ 714 715 /** 716 * @} 717 */ 718 719 /** 720 * @} 721 */ 722 723 #endif /* AES */ 724 725 /** 726 * @} 727 */ 728 729 #ifdef __cplusplus 730 } 731 #endif 732 733 #endif /* STM32L4xx_HAL_CRYP_H */ 734
