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Searched refs:CRR3 (Results 1 – 25 of 28) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_icache.c214 WRITE_REG(ICACHE->CRR3, ICACHE_REGIONSIZE_2MB << ICACHE_CRRx_RSIZE_Pos); in HAL_ICACHE_DeInit()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_icache.c214 WRITE_REG(ICACHE->CRR3, ICACHE_REGIONSIZE_2MB << ICACHE_CRRx_RSIZE_Pos); in HAL_ICACHE_DeInit()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_icache.c214 WRITE_REG(ICACHE->CRR3, ICACHE_REGIONSIZE_2MB << ICACHE_CRRx_RSIZE_Pos); in HAL_ICACHE_DeInit()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_icache.c217 WRITE_REG(ICACHE->CRR3, ICACHE_REGIONSIZE_2MB << ICACHE_CRRx_RSIZE_Pos); in HAL_ICACHE_DeInit()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h426 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32wba52xx.h517 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32wba54xx.h534 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32wba5mxx.h534 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32wba55xx.h534 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h738 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32l562xx.h772 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h679 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32h562xx.h726 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32h533xx.h716 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32h573xx.h941 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32h563xx.h904 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h628 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32u535xx.h589 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32u575xx.h642 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32u585xx.h682 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32u595xx.h666 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32u5a5xx.h706 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32u5f7xx.h827 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32u599xx.h847 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member
Dstm32u5g7xx.h867 __IO uint32_t CRR3; /*!< ICACHE region 3 configuration register, Address offset: 0x2C */ member

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