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Searched refs:COMP_CFGRx_INMSEL_Pos (Results 1 – 25 of 46) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h19295 #define COMP_CFGRx_INMSEL_Pos (16U) macro
19296 #define COMP_CFGRx_INMSEL_Msk (0xFUL << COMP_CFGRx_INMSEL_Pos) /*!< 0x000F0000 */
19298 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
19299 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
19300 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
19301 #define COMP_CFGRx_INMSEL_3 (0x8UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00080000 */
Dstm32h7b0xx.h19775 #define COMP_CFGRx_INMSEL_Pos (16U) macro
19776 #define COMP_CFGRx_INMSEL_Msk (0xFUL << COMP_CFGRx_INMSEL_Pos) /*!< 0x000F0000 */
19778 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
19779 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
19780 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
19781 #define COMP_CFGRx_INMSEL_3 (0x8UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00080000 */
Dstm32h7b0xxq.h19787 #define COMP_CFGRx_INMSEL_Pos (16U) macro
19788 #define COMP_CFGRx_INMSEL_Msk (0xFUL << COMP_CFGRx_INMSEL_Pos) /*!< 0x000F0000 */
19790 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
19791 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
19792 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
19793 #define COMP_CFGRx_INMSEL_3 (0x8UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00080000 */
Dstm32h7a3xxq.h19307 #define COMP_CFGRx_INMSEL_Pos (16U) macro
19308 #define COMP_CFGRx_INMSEL_Msk (0xFUL << COMP_CFGRx_INMSEL_Pos) /*!< 0x000F0000 */
19310 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
19311 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
19312 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
19313 #define COMP_CFGRx_INMSEL_3 (0x8UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00080000 */
Dstm32h7b3xx.h19782 #define COMP_CFGRx_INMSEL_Pos (16U) macro
19783 #define COMP_CFGRx_INMSEL_Msk (0xFUL << COMP_CFGRx_INMSEL_Pos) /*!< 0x000F0000 */
19785 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
19786 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
19787 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
19788 #define COMP_CFGRx_INMSEL_3 (0x8UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00080000 */
Dstm32h7b3xxq.h19794 #define COMP_CFGRx_INMSEL_Pos (16U) macro
19795 #define COMP_CFGRx_INMSEL_Msk (0xFUL << COMP_CFGRx_INMSEL_Pos) /*!< 0x000F0000 */
19797 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
19798 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
19799 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
19800 #define COMP_CFGRx_INMSEL_3 (0x8UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00080000 */
Dstm32h730xxq.h21475 #define COMP_CFGRx_INMSEL_Pos (16U) macro
21476 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
21478 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
21479 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
21480 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h733xx.h21463 #define COMP_CFGRx_INMSEL_Pos (16U) macro
21464 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
21466 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
21467 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
21468 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h725xx.h20988 #define COMP_CFGRx_INMSEL_Pos (16U) macro
20989 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
20991 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
20992 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
20993 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h730xx.h21463 #define COMP_CFGRx_INMSEL_Pos (16U) macro
21464 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
21466 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
21467 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
21468 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h735xx.h21475 #define COMP_CFGRx_INMSEL_Pos (16U) macro
21476 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
21478 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
21479 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
21480 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h742xx.h19895 #define COMP_CFGRx_INMSEL_Pos (16U) macro
19896 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
19898 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
19899 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
19900 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h723xx.h20976 #define COMP_CFGRx_INMSEL_Pos (16U) macro
20977 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
20979 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
20980 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
20981 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h750xx.h20824 #define COMP_CFGRx_INMSEL_Pos (16U) macro
20825 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
20827 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
20828 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
20829 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h753xx.h20830 #define COMP_CFGRx_INMSEL_Pos (16U) macro
20831 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
20833 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
20834 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
20835 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h745xx.h21205 #define COMP_CFGRx_INMSEL_Pos (16U) macro
21206 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
21208 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
21209 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
21210 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h745xg.h21205 #define COMP_CFGRx_INMSEL_Pos (16U) macro
21206 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
21208 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
21209 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
21210 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h743xx.h20543 #define COMP_CFGRx_INMSEL_Pos (16U) macro
20544 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
20546 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
20547 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
20548 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h755xx.h21492 #define COMP_CFGRx_INMSEL_Pos (16U) macro
21493 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
21495 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
21496 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
21497 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h757xx.h24665 #define COMP_CFGRx_INMSEL_Pos (16U) macro
24666 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
24668 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
24669 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
24670 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h747xg.h24378 #define COMP_CFGRx_INMSEL_Pos (16U) macro
24379 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
24381 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
24382 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
24383 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32h747xx.h24378 #define COMP_CFGRx_INMSEL_Pos (16U) macro
24379 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
24381 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
24382 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
24383 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h33354 #define COMP_CFGRx_INMSEL_Pos (16U) macro
33355 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
33357 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
33358 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
33359 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32mp151fxx_cm4.h33517 #define COMP_CFGRx_INMSEL_Pos (16U) macro
33518 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
33520 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
33521 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
33522 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */
Dstm32mp151axx_ca7.h33354 #define COMP_CFGRx_INMSEL_Pos (16U) macro
33355 #define COMP_CFGRx_INMSEL_Msk (0x7UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00070000 */
33357 #define COMP_CFGRx_INMSEL_0 (0x1UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00010000 */
33358 #define COMP_CFGRx_INMSEL_1 (0x2UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00020000 */
33359 #define COMP_CFGRx_INMSEL_2 (0x4UL << COMP_CFGRx_INMSEL_Pos) /*!< 0x00040000 */

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