| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/ |
| D | stm32l5xx_hal_dma_ex.c | 146 hdma->Instance->CM1AR = SecondMemAddress; in HAL_DMAEx_MultiBufferStart()
220 hdma->Instance->CM1AR = SecondMemAddress; in HAL_DMAEx_MultiBufferStart_IT()
301 hdma->Instance->CM1AR = Address; in HAL_DMAEx_ChangeMemory()
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| D | stm32l5xx_ll_dma.c | 185 WRITE_REG(tmp->CM1AR, 0U); in LL_DMA_DeInit()
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
| D | stm32h7xx_hal_dma_ex.c | 168 ((BDMA_Channel_TypeDef *)hdma->Instance)->CM1AR = SecondMemAddress; in HAL_DMAEx_MultiBufferStart()
264 ((BDMA_Channel_TypeDef *)hdma->Instance)->CM1AR = SecondMemAddress; in HAL_DMAEx_MultiBufferStart_IT()
382 ((BDMA_Channel_TypeDef *)hdma->Instance)->CM1AR = Address; in HAL_DMAEx_ChangeMemory()
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| D | stm32h7xx_ll_bdma.c | 172 LL_BDMA_WriteReg(tmp, CM1AR, 0U); in LL_BDMA_DeInit()
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| D | stm32h7xx_hal_dma.c | 523 ((BDMA_Channel_TypeDef *)hdma->Instance)->CM1AR = 0U; in HAL_DMA_DeInit()
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_ll_bdma.h | 1388 …MODIFY_REG(((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM1AR, BDM… in LL_BDMA_SetMemory1Address()
1410 return (((BDMA_Channel_TypeDef *)(bdma_base_addr + LL_BDMA_CH_OFFSET_TAB[Channel]))->CM1AR); in LL_BDMA_GetMemory1Address()
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
| D | stm32l5xx_ll_dma.h | 1917 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CM1AR, MemoryAdd… in LL_DMA_SetMemory1Address()
1938 return (READ_REG(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CM1AR)); in LL_DMA_GetMemory1Address()
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| /hal_stm32-latest/stm32cube/stm32l5xx/soc/ |
| D | stm32l552xx.h | 476 …__IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register, Address offset: 0x1… member
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| D | stm32l562xx.h | 510 …__IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register, Address offset: 0x1… member
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| /hal_stm32-latest/stm32cube/stm32h7xx/soc/ |
| D | stm32h7a3xx.h | 601 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h7b0xx.h | 604 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h7b0xxq.h | 605 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h7a3xxq.h | 602 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h7b3xx.h | 604 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h7b3xxq.h | 605 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h730xxq.h | 628 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h733xx.h | 627 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h725xx.h | 625 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h730xx.h | 627 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h735xx.h | 628 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h742xx.h | 580 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h723xx.h | 624 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h750xx.h | 584 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h753xx.h | 584 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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| D | stm32h745xx.h | 615 __IO uint32_t CM1AR; /*!< DMA channel x memory 1 address register */ member
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