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Searched refs:CFGR3 (Results 1 – 25 of 100) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc_ex.h2963 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_I2C2SW, (uint32_t)(__I2C2CLKSource__))
2970 #define __HAL_RCC_GET_I2C2_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_I2C2SW)))
2979 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_I2C3SW, (uint32_t)(__I2C3CLKSource__))
2986 #define __HAL_RCC_GET_I2C3_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_I2C3SW)))
3002 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_TIM1SW, (uint32_t)(__TIM1CLKSource__))
3009 #define __HAL_RCC_GET_TIM1_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_TIM1SW)))
3018 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_TIM15SW, (uint32_t)(__TIM15CLKSource__))
3025 #define __HAL_RCC_GET_TIM15_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_TIM15SW)))
3034 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_TIM16SW, (uint32_t)(__TIM16CLKSource__))
3041 #define __HAL_RCC_GET_TIM16_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_TIM16SW)))
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Dstm32f3xx_ll_rcc.h1490 …MODIFY_REG(RCC->CFGR3, (RCC_CFGR3_USART1SW << ((USARTxSource & 0xFF000000U) >> 24U)), (USARTxSour… in LL_RCC_SetUSARTClockSource()
1511 …MODIFY_REG(RCC->CFGR3, ((UARTxSource & 0x0000FFFFU) << 8U), (UARTxSource & (RCC_CFGR3_UART4SW | R… in LL_RCC_SetUARTClockSource()
1533 MODIFY_REG(RCC->CFGR3, ((I2CxSource & 0xFF000000U) >> 24U), (I2CxSource & 0x00FFFFFFU)); in LL_RCC_SetI2CClockSource()
1585 MODIFY_REG(RCC->CFGR3, (RCC_CFGR3_TIM1SW << (TIMxSource >> 27U)), (TIMxSource & 0x03FFFFFFU)); in LL_RCC_SetTIMClockSource()
1600 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_HRTIMSW, HRTIMxSource); in LL_RCC_SetHRTIMClockSource()
1615 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_CECSW, CECxSource); in LL_RCC_SetCECClockSource()
1781 return (uint32_t)(READ_BIT(RCC->CFGR3, (RCC_CFGR3_USART1SW << USARTx)) | (USARTx << 24U)); in LL_RCC_GetUSARTClockSource()
1804 return (uint32_t)(READ_BIT(RCC->CFGR3, UARTx) | (UARTx >> 8U)); in LL_RCC_GetUARTClockSource()
1831 return (uint32_t)(READ_BIT(RCC->CFGR3, I2Cx) | (I2Cx << 24U)); in LL_RCC_GetI2CClockSource()
1894 return (uint32_t)(READ_BIT(RCC->CFGR3, (RCC_CFGR3_TIM1SW << TIMx)) | (TIMx << 27U)); in LL_RCC_GetTIMClockSource()
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Dstm32f3xx_hal_rcc.h1258 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_USART1SW, (uint32_t)(__USART1CLKSOURCE__))
1308 #define __HAL_RCC_GET_USART1_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_USART1SW)))
1320 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_USART2SW, (uint32_t)(__USART2CLKSOURCE__))
1329 #define __HAL_RCC_GET_USART2_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_USART2SW)))
1342 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_USART3SW, (uint32_t)(__USART3CLKSOURCE__))
1351 #define __HAL_RCC_GET_USART3_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_USART3SW)))
1368 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_I2C1SW, (uint32_t)(__I2C1CLKSOURCE__))
1375 #define __HAL_RCC_GET_I2C1_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_I2C1SW)))
Dstm32f3xx_hal.h641 … (SYSCFG->CFGR3 |= ((__DMA_REMAP__) & ~HAL_REMAP_CFGR3_MASK)) : \
646 … (SYSCFG->CFGR3 &= (~(__DMA_REMAP__) | HAL_REMAP_CFGR3_MASK)) : \
782 … (SYSCFG->CFGR3 |= ((__TRIGGER_REMAP__) & ~HAL_REMAP_CFGR3_MASK)) : \
787 … (SYSCFG->CFGR3 &= (~(__TRIGGER_REMAP__) | HAL_REMAP_CFGR3_MASK)) : \
Dstm32f3xx_ll_system.h542 MODIFY_REG(SYSCFG->CFGR3, (Remap >> 16U), (Remap & 0x0000FFFF)); in LL_SYSCFG_SetRemapDMA_SPI()
562 MODIFY_REG(SYSCFG->CFGR3, (Remap >> 16U), (Remap & 0x0000FFFF)); in LL_SYSCFG_SetRemapDMA_I2C()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_system.h469 MODIFY_REG(SYSCFG->CFGR3, SYSCFG_CFGR3_VREF_OUT, IoPinConnect); in LL_SYSCFG_VREFINT_SetConnection()
483 return (uint32_t)(READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_VREF_OUT)); in LL_SYSCFG_VREFINT_GetConnection()
496 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC); in LL_SYSCFG_VREFINT_EnableADC()
506 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC); in LL_SYSCFG_VREFINT_DisableADC()
516 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC); in LL_SYSCFG_TEMPSENSOR_Enable()
526 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC); in LL_SYSCFG_TEMPSENSOR_Disable()
536 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP); in LL_SYSCFG_VREFINT_EnableCOMP()
546 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP); in LL_SYSCFG_VREFINT_DisableCOMP()
557 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48); in LL_SYSCFG_VREFINT_EnableHSI48()
567 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48); in LL_SYSCFG_VREFINT_DisableHSI48()
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Dstm32l0xx_hal.h339 #define __HAL_SYSCFG_GET_FLAG(__FLAG__) (((SYSCFG->CFGR3) & (__FLAG__)) == (__FLAG__))
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_adc_ex.c261 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC); in HAL_ADCEx_EnableVREFINT()
267 while (HAL_IS_BIT_CLR(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF)) in HAL_ADCEx_EnableVREFINT()
272 if (HAL_IS_BIT_CLR(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF)) in HAL_ADCEx_EnableVREFINT()
291 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC); in HAL_ADCEx_DisableVREFINT()
308 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC); in HAL_ADCEx_EnableVREFINTTempSensor()
314 while (HAL_IS_BIT_CLR(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF)) in HAL_ADCEx_EnableVREFINTTempSensor()
319 if (HAL_IS_BIT_CLR(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF)) in HAL_ADCEx_EnableVREFINTTempSensor()
338 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC); in HAL_ADCEx_DisableVREFINTTempSensor()
Dstm32l0xx_hal.c634 SYSCFG->CFGR3 &= ~(SYSCFG_CFGR3_VREF_OUT); in HAL_SYSCFG_VREFINT_OutputSelect()
635 SYSCFG->CFGR3 |= (uint32_t)(SYSCFG_Vrefint_OUTPUT); in HAL_SYSCFG_VREFINT_OutputSelect()
645 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK); in HAL_SYSCFG_Enable_Lock_VREFINT()
655 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK); in HAL_SYSCFG_Disable_Lock_VREFINT()
Dstm32l0xx_hal_comp_ex.c96 SYSCFG->CFGR3 |= (SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP | SYSCFG_CFGR3_EN_VREFINT); in HAL_COMPEx_EnableVREFINT()
118 …SYSCFG->CFGR3 &= (uint32_t)~((uint32_t)(SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP | SYSCFG_CFGR3_EN_VREFIN… in HAL_COMPEx_DisableVREFINT()
Dstm32l0xx_hal_pwr.c476 vrefinbit = READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_EN_VREFINT); in HAL_PWR_EnterSLEEPMode()
557 vrefinbit = READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_EN_VREFINT); in HAL_PWR_EnterSTOPMode()
Dstm32l0xx_hal_comp.c346 …comp_voltage_scaler_not_initialized = (READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP) … in HAL_COMP_Init()
348 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_EN_VREFINT | in HAL_COMP_Init()
Dstm32l0xx_hal_rcc_ex.c828 SET_BIT (SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48); in HAL_RCCEx_EnableHSI48_VREFINT()
839 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48); in HAL_RCCEx_DisableHSI48_VREFINT()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_rcc.h1273 …MODIFY_REG(RCC->CFGR3, (RCC_CFGR3_USART1SW << ((USARTxSource & 0xFF000000U) >> 24U)), (USARTxSour… in LL_RCC_SetUSARTClockSource()
1286 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_I2C1SW, I2CxSource); in LL_RCC_SetI2CClockSource()
1300 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_CECSW, CECxSource); in LL_RCC_SetCECClockSource()
1318 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_USBSW, USBxSource); in LL_RCC_SetUSBClockSource()
1351 return (uint32_t)(READ_BIT(RCC->CFGR3, (RCC_CFGR3_USART1SW << USARTx)) | (USARTx << 24U)); in LL_RCC_GetUSARTClockSource()
1365 return (uint32_t)(READ_BIT(RCC->CFGR3, I2Cx)); in LL_RCC_GetI2CClockSource()
1380 return (uint32_t)(READ_BIT(RCC->CFGR3, CECx)); in LL_RCC_GetCECClockSource()
1399 return (uint32_t)(READ_BIT(RCC->CFGR3, USBx)); in LL_RCC_GetUSBClockSource()
Dstm32f0xx_hal_rcc_ex.h1750 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_USBSW, (uint32_t)(__USBCLKSOURCE__))
1761 #define __HAL_RCC_GET_USB_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_USBSW)))
1779 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_CECSW, (uint32_t)(__CECCLKSOURCE__))
1786 #define __HAL_RCC_GET_CEC_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_CECSW)))
1804 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_USART2SW, (uint32_t)(__USART2CLKSOURCE__))
1813 #define __HAL_RCC_GET_USART2_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_USART2SW)))
1826 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_USART3SW, (uint32_t)(__USART3CLKSOURCE__))
1835 #define __HAL_RCC_GET_USART3_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_USART3SW)))
Dstm32f0xx_hal_rcc.h1179 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_USART1SW, (uint32_t)(__USART1CLKSOURCE__))
1188 #define __HAL_RCC_GET_USART1_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_USART1SW)))
1205 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_I2C1SW, (uint32_t)(__I2C1CLKSOURCE__))
1212 #define __HAL_RCC_GET_I2C1_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_I2C1SW)))
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_bus.h1339 CLEAR_BIT(RCC->CFGR3, RCC_CFGR3_AHB3DIS); in LL_AHB3_GRP1_EnableBusClock()
1340 tmpreg = READ_BIT(RCC->CFGR3, RCC_CFGR3_AHB3DIS); in LL_AHB3_GRP1_EnableBusClock()
1409 SET_BIT(RCC->CFGR3, RCC_CFGR3_AHB3DIS); in LL_AHB3_GRP1_DisableBusClock()
2772 CLEAR_BIT(RCC->CFGR3, RCC_CFGR3_APB3DIS); in LL_APB3_GRP1_EnableBusClock()
2773 tmpreg = READ_BIT(RCC->CFGR3, RCC_CFGR3_APB3DIS); in LL_APB3_GRP1_EnableBusClock()
2854 SET_BIT(RCC->CFGR3, RCC_CFGR3_APB3DIS); in LL_APB3_GRP1_DisableBusClock()
Dstm32u5xx_hal_rcc.h1294 #define __HAL_RCC_AHB3_CLK_DISABLE() SET_BIT(RCC->CFGR3, RCC_CFGR3_AHB3DIS);
1300 #define __HAL_RCC_APB3_CLK_DISABLE() SET_BIT(RCC->CFGR3, RCC_CFGR3_APB3DIS);
1326 CLEAR_BIT(RCC->CFGR3, RCC_CFGR3_AHB3DIS); \
1327 tmpreg = READ_BIT(RCC->CFGR3, RCC_CFGR3_AHB3DIS); \
1347 CLEAR_BIT(RCC->CFGR3, RCC_CFGR3_APB3DIS); \
1348 tmpreg = READ_BIT(RCC->CFGR3, RCC_CFGR3_APB3DIS); \
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c1389 if ((pRCC_ClkInitStruct->APB3CLKDivider) > (RCC->CFGR3 & RCC_CFGR3_PPRE3)) in HAL_RCC_ClockConfig()
1392 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_PPRE3, pRCC_ClkInitStruct->APB3CLKDivider); in HAL_RCC_ClockConfig()
1593 if ((pRCC_ClkInitStruct->APB3CLKDivider) < (RCC->CFGR3 & RCC_CFGR3_PPRE3)) in HAL_RCC_ClockConfig()
1596 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_PPRE3, (pRCC_ClkInitStruct->APB3CLKDivider)); in HAL_RCC_ClockConfig()
1851 …return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR3 & RCC_CFGR3_PPRE3) >> RCC_CFGR3_PPRE3_P… in HAL_RCC_GetPCLK3Freq()
1984 pRCC_ClkInitStruct->APB3CLKDivider = (uint32_t)(RCC->CFGR3 & RCC_CFGR3_PPRE3); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_rcc.c261 CLEAR_REG(RCC->CFGR3); in HAL_RCC_DeInit()
1150 WRITE_REG(RCC->CFGR3, RCC_ClkInitStruct->APB7CLKDivider); in HAL_RCC_ClockConfig()
1343 …return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR3 & RCC_CFGR3_PPRE7) >> RCC_CFGR3_PPRE7_P… in HAL_RCC_GetPCLK7Freq()
1545 RCC_ClkInitStruct->APB7CLKDivider = (RCC->CFGR3 & RCC_CFGR3_PPRE7); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_system.h510 MODIFY_REG(SYSCFG->CFGR3, (mux_cfg >> 16U), (mux_cfg & 0x0000FFFFU)); in LL_SYSCFG_ConfigPinMux()
521 return (uint32_t)(READ_BIT(SYSCFG->CFGR3, LL_PINMUX_PACKx_PINy) | (LL_PINMUX_PACKx_PINy << 16U)); in LL_SYSCFG_GetConfigPinMux()
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dsystem_stm32u5xx.c207 RCC->CFGR3 = 0U; in SystemInit()
Dsystem_stm32u5xx_s.c225 RCC->CFGR3 = 0U; in SystemInit()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_ll_rcc.c171 LL_RCC_WriteReg(CFGR3, 0x00000000U); in LL_RCC_DeInit()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_rcc.h1536 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_PPRE7, Prescaler); in LL_RCC_SetAPB7Prescaler()
1638 return (uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_PPRE7)); in LL_RCC_GetAPB7Prescaler()

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