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Searched refs:APB3ENR (Results 1 – 25 of 56) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1821 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_SBSEN); \
1823 … tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_SBSEN); \
1830 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_SPI5EN); \
1832 … tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_SPI5EN); \
1839 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_LPUART1EN); \
1841 … tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_LPUART1EN); \
1848 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_I2C3EN); \
1850 … tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_I2C3EN); \
1858 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_I2C4EN); \
1860 … tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_I2C4EN); \
[all …]
Dstm32h5xx_ll_bus.h2532 SET_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
2534 tmpreg = READ_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
2572 return ((READ_BIT(RCC->APB3ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB3_GRP1_IsEnabledClock()
2609 CLEAR_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1870 … SET_BIT(RCC->APB3ENR, RCC_APB3ENR_SYSCFGEN); \
1872 … tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_SYSCFGEN); \
1878 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_SPI3EN); \
1880 … tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_SPI3EN); \
1886 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_LPUART1EN); \
1888 … tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_LPUART1EN); \
1894 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_I2C3EN); \
1896 … tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_I2C3EN); \
1902 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_LPTIM1EN); \
1904 … tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_LPTIM1EN); \
[all …]
Dstm32u5xx_ll_bus.h2808 SET_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
2810 tmpreg = READ_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
2844 return ((READ_BIT(RCC->APB3ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB3_GRP1_IsEnabledClock()
2887 CLEAR_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_bus.h1681 SET_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
1683 tmpreg = READ_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
1702 return ((READ_BIT(RCC->APB3ENR, Periphs) == Periphs) ? 1U : 0U); in LL_APB3_GRP1_IsEnabledClock()
1720 CLEAR_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_DisableClock()
4170 SET_BIT(RCC_C1->APB3ENR, Periphs); in LL_C1_APB3_GRP1_EnableClock()
4172 tmpreg = READ_BIT(RCC_C1->APB3ENR, Periphs); in LL_C1_APB3_GRP1_EnableClock()
4191 return ((READ_BIT(RCC_C1->APB3ENR, Periphs) == Periphs) ? 1U : 0U); in LL_C1_APB3_GRP1_IsEnabledClock()
4210 CLEAR_BIT(RCC_C1->APB3ENR, Periphs); in LL_C1_APB3_GRP1_DisableClock()
5929 SET_BIT(RCC_C2->APB3ENR, Periphs); in LL_C2_APB3_GRP1_EnableClock()
5931 tmpreg = READ_BIT(RCC_C2->APB3ENR, Periphs); in LL_C2_APB3_GRP1_EnableClock()
[all …]
Dstm32h7xx_hal_rcc.h1699 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_LTDCEN);\
1701 tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_LTDCEN);\
1709 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_DSIEN);\
1711 tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_DSIEN);\
1718 SET_BIT(RCC->APB3ENR, RCC_APB3ENR_WWDG1EN);\
1720 tmpreg = READ_BIT(RCC->APB3ENR, RCC_APB3ENR_WWDG1EN);\
1725 #define __HAL_RCC_LTDC_CLK_DISABLE() (RCC->APB3ENR) &= ~ (RCC_APB3ENR_LTDCEN)
1728 #define __HAL_RCC_DSI_CLK_DISABLE() (RCC->APB3ENR) &= ~ (RCC_APB3ENR_DSIEN)
1730 #define __HAL_RCC_WWDG1_CLK_DISABLE() (RCC->APB3ENR) &= ~ (RCC_APB3ENR_WWDG1EN)
1739 #define __HAL_RCC_LTDC_IS_CLK_ENABLED() ((RCC->APB3ENR & RCC_APB3ENR_LTDCEN) != 0U)
[all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_bus.h1491 SET_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
1493 tmpreg = READ_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_EnableClock()
1506 return ((READ_BIT(RCC->APB3ENR, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB3_GRP1_IsEnabledClock()
1518 CLEAR_BIT(RCC->APB3ENR, Periphs); in LL_APB3_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h546 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clocks enable register, … member
Dstm32wle5xx.h546 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clocks enable register, … member
Dstm32wl5mxx.h687 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clocks enable register, … member
Dstm32wl54xx.h687 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clocks enable register, … member
Dstm32wl55xx.h687 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clocks enable register, … member
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h745xx.h1326 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, … member
1352 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, A… member
Dstm32h745xg.h1326 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, … member
1352 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, A… member
Dstm32h755xx.h1327 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, … member
1353 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, A… member
Dstm32h757xx.h1408 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, … member
1434 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, A… member
Dstm32h747xg.h1407 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, … member
1433 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, A… member
Dstm32h747xx.h1407 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, … member
1433 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, A… member
Dstm32h7a3xx.h1128 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, … member
Dstm32h7b0xx.h1131 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, … member
Dstm32h7b0xxq.h1132 …__IO uint32_t APB3ENR; /*!< RCC APB3 peripheral clock register, … member
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h745 …__IO uint32_t APB3ENR; /*!< RCC APB3 Peripherals Clock Enable Register … member
Dstm32h523xx.h909 …__IO uint32_t APB3ENR; /*!< RCC APB3 Peripherals Clock Enable Register … member
Dstm32h562xx.h956 …__IO uint32_t APB3ENR; /*!< RCC APB3 Peripherals Clock Enable Register … member
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h988 …__IO uint32_t APB3ENR; /*!< APB3 Peripherals Clock Enable Register … member

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