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Searched refs:APB2CLKDivider (Results 1 – 25 of 76) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_rcc.c997 if ((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2)) in HAL_RCC_ClockConfig()
999 assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1000 MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1003 if ((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE2)) in HAL_RCC_ClockConfig()
1005 assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1006 MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE2, (RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1185 if ((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2)) in HAL_RCC_ClockConfig()
1187 assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1188 MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1191 if ((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE2)) in HAL_RCC_ClockConfig()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc.c1078 if ((pClkInitStruct->APB2CLKDivider) > ((RCC->CFGR2 & RCC_CFGR2_PPRE2) >> 4)) in HAL_RCC_ClockConfig()
1080 assert_param(IS_RCC_PCLK(pClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1081 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE2, ((pClkInitStruct->APB2CLKDivider) << 4)); in HAL_RCC_ClockConfig()
1238 if ((pClkInitStruct->APB2CLKDivider) < ((RCC->CFGR2 & RCC_CFGR2_PPRE2) >> 4)) in HAL_RCC_ClockConfig()
1240 assert_param(IS_RCC_PCLK(pClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1241 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE2, ((pClkInitStruct->APB2CLKDivider) << 4)); in HAL_RCC_ClockConfig()
1647 pClkInitStruct->APB2CLKDivider = (uint32_t)((regval & RCC_CFGR2_PPRE2) >> 4); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c1398 if ((pRCC_ClkInitStruct->APB2CLKDivider) > ((RCC->CFGR2 & RCC_CFGR2_PPRE2) >> 4)) in HAL_RCC_ClockConfig()
1400 assert_param(IS_RCC_PCLK(pRCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1401 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE2, ((pRCC_ClkInitStruct->APB2CLKDivider) << 4)); in HAL_RCC_ClockConfig()
1583 if ((pRCC_ClkInitStruct->APB2CLKDivider) < ((RCC->CFGR2 & RCC_CFGR2_PPRE2) >> 4)) in HAL_RCC_ClockConfig()
1585 assert_param(IS_RCC_PCLK(pRCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1586 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE2, ((pRCC_ClkInitStruct->APB2CLKDivider) << 4)); in HAL_RCC_ClockConfig()
1981 pRCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR2 & RCC_CFGR2_PPRE2) >> 4); in HAL_RCC_GetClockConfig()
Dstm32u5xx_ll_utils.c824 assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
858 LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_rcc.c931 assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
932 if ((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->APBCFGR & RCC_APBCFGR_PPRE2)) in HAL_RCC_ClockConfig()
934 MODIFY_REG(RCC->APBCFGR, RCC_APBCFGR_PPRE2, (RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1066 assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1067 if ((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->APBCFGR & RCC_APBCFGR_PPRE2)) in HAL_RCC_ClockConfig()
1069 MODIFY_REG(RCC->APBCFGR, RCC_APBCFGR_PPRE2, (RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1848 RCC_ClkInitStruct->APB2CLKDivider = READ_BIT(RCC->APBCFGR, RCC_APBCFGR_PPRE2); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rcc.c909 assert_param(IS_RCC_PCLK2(pRCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
910 if ((pRCC_ClkInitStruct->APB2CLKDivider) > (RCC->CFGR2 & RCC_CFGR2_PPRE2)) in HAL_RCC_ClockConfig()
912 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE2, (pRCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1131 assert_param(IS_RCC_PCLK2(pRCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1132 if ((pRCC_ClkInitStruct->APB2CLKDivider) < (RCC->CFGR2 & RCC_CFGR2_PPRE2)) in HAL_RCC_ClockConfig()
1134 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE2, (pRCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1807 pRCC_ClkInitStruct->APB2CLKDivider = (cfgr_value & RCC_CFGR2_PPRE2); in HAL_RCC_GetClockConfig()
Dstm32n6xx_ll_utils.c573 assert_param(IS_LL_UTILS_APB2_DIV(pUTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLL1AndSwitchSystem()
614 LL_RCC_SetAPB2Prescaler(pUTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLL1AndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_rcc.c714 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
715 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); in HAL_RCC_ClockConfig()
1073 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_hal_rcc.c803 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
804 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); in HAL_RCC_ClockConfig()
1173 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); in HAL_RCC_GetClockConfig()
Dstm32f3xx_ll_utils.c514 assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
546 LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_rcc.c832 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
833 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); in HAL_RCC_ClockConfig()
1174 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); in HAL_RCC_GetClockConfig()
Dstm32f2xx_ll_utils.c578 assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
610 LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_rcc.c946 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
947 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); in HAL_RCC_ClockConfig()
1288 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); in HAL_RCC_GetClockConfig()
Dstm32l1xx_ll_utils.c516 assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
548 LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_rcc.c1018 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1019 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); in HAL_RCC_ClockConfig()
1439 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3); in HAL_RCC_GetClockConfig()
Dstm32l0xx_ll_utils.c523 assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
555 LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_rcc.c937 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
938 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); in HAL_RCC_ClockConfig()
1329 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_rcc.c845 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
846 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); in HAL_RCC_ClockConfig()
1188 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_rcc.c931 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
932 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); in HAL_RCC_ClockConfig()
1267 RCC_ClkInitStruct->APB2CLKDivider = (READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2) >> 3U); in HAL_RCC_GetClockConfig()
Dstm32g4xx_ll_utils.c645 assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
678 LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_ll_utils.c558 assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
592 LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
Dstm32wbaxx_hal_rcc.c1132 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1136 tmpreg1 |= (RCC_ClkInitStruct->APB2CLKDivider << (RCC_CFGR2_PPRE2_Pos - RCC_CFGR2_PPRE1_Pos)); in HAL_RCC_ClockConfig()
1542 …RCC_ClkInitStruct->APB2CLKDivider = ((tmpreg1 & RCC_CFGR2_PPRE2) >> (RCC_CFGR2_PPRE2_Pos - RCC_CFG… in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_rcc.c1036 assert_param(IS_RCC_PCLKx(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1037 LL_RCC_SetAPB2Prescaler((RCC_ClkInitStruct->APB2CLKDivider) << 3U); in HAL_RCC_ClockConfig()
1482 RCC_ClkInitStruct->APB2CLKDivider = (regvalue & RCC_CFGR_PPRE2); in HAL_RCC_GetClockConfig()
Dstm32wlxx_ll_utils.c724 assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
765 LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_rcc.c1164 assert_param(IS_RCC_PCLKx(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()
1165 LL_RCC_SetAPB2Prescaler((RCC_ClkInitStruct->APB2CLKDivider) << 3U); in HAL_RCC_ClockConfig()
1620 RCC_ClkInitStruct->APB2CLKDivider = LL_RCC_GetAPB2Prescaler(); in HAL_RCC_GetClockConfig()

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