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Searched refs:APB1CLKDivider (Results 1 – 25 of 108) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_rcc.c980 if ((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1)) in HAL_RCC_ClockConfig()
982 assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
983 MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
986 if ((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE1)) in HAL_RCC_ClockConfig()
988 assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
989 MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE1, (RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1167 if ((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1)) in HAL_RCC_ClockConfig()
1169 assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1170 MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1173 if ((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE1)) in HAL_RCC_ClockConfig()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc.c1088 if ((pClkInitStruct->APB1CLKDivider) > (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
1090 assert_param(IS_RCC_PCLK(pClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1091 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, pClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1228 if ((pClkInitStruct->APB1CLKDivider) < (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
1230 assert_param(IS_RCC_PCLK(pClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1231 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, pClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1644 pClkInitStruct->APB1CLKDivider = (uint32_t)(regval & RCC_CFGR2_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c1408 if ((pRCC_ClkInitStruct->APB1CLKDivider) > (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
1410 assert_param(IS_RCC_PCLK(pRCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1411 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, pRCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1573 if ((pRCC_ClkInitStruct->APB1CLKDivider) < (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
1575 assert_param(IS_RCC_PCLK(pRCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1576 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, pRCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1978 pRCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_rcc.c921 assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
922 if ((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->APBCFGR & RCC_APBCFGR_PPRE1)) in HAL_RCC_ClockConfig()
924 MODIFY_REG(RCC->APBCFGR, RCC_APBCFGR_PPRE1, (RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1056 assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1057 if ((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->APBCFGR & RCC_APBCFGR_PPRE1)) in HAL_RCC_ClockConfig()
1059 MODIFY_REG(RCC->APBCFGR, RCC_APBCFGR_PPRE1, (RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1845 RCC_ClkInitStruct->APB1CLKDivider = READ_BIT(RCC->APBCFGR, RCC_APBCFGR_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rcc.c899 assert_param(IS_RCC_PCLK1(pRCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
900 if ((pRCC_ClkInitStruct->APB1CLKDivider) > (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
902 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, (pRCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1121 assert_param(IS_RCC_PCLK1(pRCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1122 if ((pRCC_ClkInitStruct->APB1CLKDivider) < (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
1124 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, (pRCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1804 pRCC_ClkInitStruct->APB1CLKDivider = (cfgr_value & RCC_CFGR2_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_rcc.c781 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
782 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1097 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_rcc.c707 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
708 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1070 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_hal_rcc.c796 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
797 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1170 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
Dstm32f3xx_ll_utils.c513 assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
545 LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_rcc.c825 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
826 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1171 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
Dstm32f2xx_ll_utils.c577 assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
609 LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_hal_rcc.c898 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
899 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1315 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE); in HAL_RCC_GetClockConfig()
Dstm32f0xx_ll_utils.c556 assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
587 LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_rcc.c939 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
940 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1285 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
Dstm32l1xx_ll_utils.c515 assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
547 LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_rcc.c1011 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1012 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1436 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
Dstm32l0xx_ll_utils.c522 assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
554 LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_rcc.c930 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
931 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1326 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_rcc.c838 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
839 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1185 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_rcc.c943 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
944 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1339 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE); in HAL_RCC_GetClockConfig()
Dstm32g0xx_ll_utils.c513 assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
545 LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_rcc.c924 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
925 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1264 RCC_ClkInitStruct->APB1CLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_ll_utils.c557 assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
591 LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_rcc.c1019 assert_param(IS_RCC_PCLKx(RCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1020 LL_RCC_SetAPB1Prescaler(RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1479 RCC_ClkInitStruct->APB1CLKDivider = (regvalue & RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_ll_utils.c633 assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
665 LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider); in UTILS_EnablePLLAndSwitchSystem()

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