Home
last modified time | relevance | path

Searched refs:AHB3LPENR (Results 1 – 25 of 78) sorted by relevance

1234

/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h5161 #define __HAL_RCC_MDMA_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_MDMALPEN))
5162 #define __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_DMA2DLPEN))
5164 #define __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_JPGDECLPEN))
5166 #define __HAL_RCC_FLASH_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FLASHLPEN))
5167 #define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FMCLPEN))
5169 #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_QSPILPEN))
5171 #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_SDMMC1LPEN))
5173 #define __HAL_RCC_OSPI1_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_OSPI1LPEN))
5176 #define __HAL_RCC_OSPI2_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_OSPI2LPEN))
5179 #define __HAL_RCC_IOMNGR_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_IOMNGRLPEN))
[all …]
Dstm32h7xx_ll_bus.h782 SET_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
784 tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
830 CLEAR_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_DisableClockSleep()
3489 SET_BIT(RCC_C1->AHB3LPENR, Periphs); in LL_C1_AHB3_GRP1_EnableClockSleep()
3491 tmpreg = READ_BIT(RCC_C1->AHB3LPENR, Periphs); in LL_C1_AHB3_GRP1_EnableClockSleep()
3537 CLEAR_BIT(RCC_C1->AHB3LPENR, Periphs); in LL_C1_AHB3_GRP1_DisableClockSleep()
5306 SET_BIT(RCC_C2->AHB3LPENR, Periphs); in LL_C2_AHB3_GRP1_EnableClockSleep()
5308 tmpreg = READ_BIT(RCC_C2->AHB3LPENR, Periphs); in LL_C2_AHB3_GRP1_EnableClockSleep()
5340 CLEAR_BIT(RCC_C2->AHB3LPENR, Periphs); in LL_C2_AHB3_GRP1_DisableClockSleep()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_bus.h803 SET_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockLowPower()
805 tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockLowPower()
818 CLEAR_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_DisableClockLowPower()
Dstm32f2xx_hal_rcc.h1286 #define __HAL_RCC_FSMC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FSMCLPEN))
1287 #define __HAL_RCC_FSMC_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_FSMCLPEN))
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_bus.h972 SET_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockLowPower()
974 tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockLowPower()
991 CLEAR_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_DisableClockLowPower()
Dstm32f7xx_hal_rcc_ex.h2099 #define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FMCLPEN))
2100 #define __HAL_RCC_FMC_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_FMCLPEN))
2102 #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_QSPILPEN))
2103 #define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_QSPILPEN))
2374 #define __HAL_RCC_FMC_IS_CLK_SLEEP_ENABLED() ((RCC->AHB3LPENR & (RCC_AHB3LPENR_FMCLPEN)) != RESET)
2375 #define __HAL_RCC_FMC_IS_CLK_SLEEP_DISABLED() ((RCC->AHB3LPENR & (RCC_AHB3LPENR_FMCLPEN)) == RESET)
2377 #define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED() ((RCC->AHB3LPENR & (RCC_AHB3LPENR_QSPILPEN)) != RESE…
2378 #define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED() ((RCC->AHB3LPENR & (RCC_AHB3LPENR_QSPILPEN)) == RESE…
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_hal_rcc.h2715 #define __HAL_RCC_RNG_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3LPENR, RCC_AHB3LPENR_RNGLPEN)
2717 #define __HAL_RCC_HASH_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3LPENR, RCC_AHB3LPENR_HASHLPEN)
2720 #define __HAL_RCC_CRYP_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3LPENR, RCC_AHB3LPENR_CRYPLPEN)
2724 #define __HAL_RCC_SAES_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3LPENR, RCC_AHB3LPENR_SAESLPEN)
2728 #define __HAL_RCC_PKA_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3LPENR, RCC_AHB3LPENR_PKALPEN)
2732 #define __HAL_RCC_RNG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3LPENR, RCC_AHB3LPENR_RNGLPEN)
2734 #define __HAL_RCC_HASH_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3LPENR, RCC_AHB3LPENR_HASHLPEN)
2737 #define __HAL_RCC_CRYP_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3LPENR, RCC_AHB3LPENR_CRYPLPEN)
2741 #define __HAL_RCC_SAES_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3LPENR, RCC_AHB3LPENR_SAESLPEN)
2745 #define __HAL_RCC_PKA_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3LPENR, RCC_AHB3LPENR_PKALPEN)
[all …]
Dstm32h7rsxx_ll_bus.h785 SET_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
787 tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockSleep()
810 CLEAR_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_DisableClockSleep()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_bus.h1083 SET_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockLowPower()
1085 tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_EnableClockLowPower()
1104 CLEAR_BIT(RCC->AHB3LPENR, Periphs); in LL_AHB3_GRP1_DisableClockLowPower()
Dstm32f4xx_hal_rcc_ex.h1924 #define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FMCLPEN))
1925 #define __HAL_RCC_FMC_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_FMCLPEN))
1928 #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_QSPILPEN))
1929 #define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_QSPILPEN))
2831 #define __HAL_RCC_FSMC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FSMCLPEN))
2832 #define __HAL_RCC_FSMC_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_FSMCLPEN))
4667 #define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_FMCLPEN))
4668 #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() (RCC->AHB3LPENR |= (RCC_AHB3LPENR_QSPILPEN))
4670 #define __HAL_RCC_FMC_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_FMCLPEN))
4671 #define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE() (RCC->AHB3LPENR &= ~(RCC_AHB3LPENR_QSPILPEN))
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_bus.h1306 tmpreg = READ_REG(RCC->AHB3LPENR); in LL_AHB3_GRP1_EnableClockLowPower()
1335 return ((READ_BIT(RCC->AHB3LPENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB3_GRP1_IsEnabledClockLowPower()
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f401xc.h357 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral clock enable in low power mode register, Add… member
Dstm32f401xe.h357 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral clock enable in low power mode register, Add… member
Dstm32f411xe.h358 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral clock enable in low power mode register, Add… member
Dstm32f405xx.h522 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral clock enable in low power mode register, Add… member
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h745xx.h1332 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, … member
1358 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, A… member
Dstm32h745xg.h1332 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, … member
1358 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, A… member
Dstm32h755xx.h1333 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, … member
1359 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, A… member
Dstm32h757xx.h1414 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, … member
1440 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, A… member
Dstm32h747xg.h1413 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, … member
1439 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, A… member
Dstm32h747xx.h1413 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, … member
1439 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral sleep clock register, A… member
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h519 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral clock enable in low power mode register, Add… member
Dstm32f205xx.h518 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral clock enable in low power mode register, Add… member
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h529 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral clock enable in low power mode register, Add… member
Dstm32f722xx.h529 …__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral clock enable in low power mode register, Add… member

1234