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Searched refs:ADC_CHSELR_CHSEL (Results 1 – 25 of 87) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_adc.h83 #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
2307 uint32_t ChannelsBitfield = READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL); in LL_ADC_REG_GetSequencerChannels()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_adc.h83 #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
2702 uint32_t ChannelsBitfield = READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL); in LL_ADC_REG_GetSequencerChannels()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_adc.h104 #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
3248 uint32_t channels_bitfield = (uint32_t)READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL); in LL_ADC_REG_GetSequencerChannels()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_adc.h102 #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
3266 uint32_t channels_bitfield = (uint32_t)READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL); in LL_ADC_REG_GetSequencerChannels()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_adc.h102 #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
3503 uint32_t channels_bitfield = (uint32_t)READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL); in LL_ADC_REG_GetSequencerChannels()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_adc.h102 #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
3572 uint32_t ChannelsBitfield = (uint32_t)READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL); in LL_ADC_REG_GetSequencerChannels()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_adc.h104 #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
3569 uint32_t channels_bitfield = (uint32_t)READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL); in LL_ADC_REG_GetSequencerChannels()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_adc.h264 #define ADC4_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
5015 …SET_BIT(ADCx->CHSELR, (1UL << ((__LL_ADC_CHANNEL_TO_DECIMAL_NB(Channel) & ADC_CHSELR_CHSEL) & 0x1F… in LL_ADC_REG_SetSequencerChAdd()
5178 uint32_t channels_bitfield = READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL); in LL_ADC_REG_GetSequencerChannels()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_adc.h194 #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
4422 uint32_t ChannelsBitfield = READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL); in LL_ADC_REG_GetSequencerChannels()
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h763 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32f030x8.h779 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32f070x6.h808 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32f031x6.h773 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32f030xc.h795 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32f038xx.h772 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32f070xb.h831 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h825 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32l010x8.h783 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32l010xb.h788 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32l011xx.h795 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32l021xx.h816 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32l031xx.h804 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32l051xx.h839 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32l010x4.h775 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro
Dstm32l010x6.h781 #define ADC_CHSELR_CHSEL ADC_CHSELR_CHSEL_Msk /*!< ADC group regul… macro

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