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Searched refs:ADC_CFGR_EXTSEL (Results 1 – 25 of 155) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_adc.h128 #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U *…
129 … ((ADC_CFGR_EXTSEL) << (4U * 1U)) | \
130 … ((ADC_CFGR_EXTSEL) << (4U * 2U)) | \
131 … ((ADC_CFGR_EXTSEL) << (4U * 3U)) )
846 #define LL_ADC_REG_TRIG_EXT_TIM3_CH4_ADC12 (ADC_CFGR_EXTSEL | ADC_REG_TRIG_EXT_EDGE_DEFAULT) …
876 #define LL_ADC_REG_TRIG_EXT_TIM2_CH1_ADC34 (ADC_CFGR_EXTSEL | ADC_REG_TRIG_EXT_EDGE_DEFAULT) …
898 #define LL_ADC_REG_TRIG_EXT_TIM3_CH4 (ADC_CFGR_EXTSEL | ADC_REG_TRIG_EXT_EDGE_DEFAULT) …
914 #define LL_ADC_REG_TRIG_EXT_TIM3_CH4 (ADC_CFGR_EXTSEL | ADC_REG_TRIG_EXT_EDGE_DEFAULT) …
930 #define LL_ADC_REG_TRIG_EXT_TIM3_CH4 (ADC_CFGR_EXTSEL | ADC_REG_TRIG_EXT_EDGE_DEFAULT) …
3216 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
[all …]
Dstm32f3xx_hal_adc_ex.h1548 #define ADC1_2_EXTERNALTRIG_T3_CC4 ((uint32_t)ADC_CFGR_EXTSEL)
1566 #define ADC3_4_EXTERNALTRIG_T2_CC1 ((uint32_t)ADC_CFGR_EXTSEL)
1581 #define ADC1_2_EXTERNALTRIG_T3_CC4 ((uint32_t)ADC_CFGR_EXTSEL)
1609 #define ADC1_2_EXTERNALTRIG_T3_CC4 ((uint32_t)ADC_CFGR_EXTSEL)
1628 #define ADC1_2_EXTERNALTRIG_T3_CC4 ((uint32_t)ADC_CFGR_EXTSEL)
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_adc.c581 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
848 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
867 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_adc.c581 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
848 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
867 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_ll_adc.c589 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
861 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
881 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_ll_adc.c633 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
905 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
924 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_ll_adc.c605 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_RES in LL_ADC_DeInit()
878 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
896 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
Dstm32mp1xx_hal_adc.c316 …ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL)) /*!< ADC_CFGR fields of parameters that can be updated when no…
581 tmpCFGR |= ((hadc->Init.ExternalTrigConv & ADC_CFGR_EXTSEL) in HAL_ADC_Init()
775 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | in HAL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_ll_adc.c690 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
1046 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
1065 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_adc.c629 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_RES in LL_ADC_DeInit()
968 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
986 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
Dstm32h7xx_hal_adc.c320 … ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL)) /*!< ADC_CFGR fields of parameters that can be updated
327 … ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL)) /*!< ADC_CFGR fields of parameters that can be updated
635 tmpCFGR |= ((hadc->Init.ExternalTrigConv & ADC_CFGR_EXTSEL) in HAL_ADC_Init()
917 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | in HAL_ADC_DeInit()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_adc.h119 #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U * …
120 … ((ADC_CFGR_EXTSEL) << (4U * 1UL)) | \
121 … ((ADC_CFGR_EXTSEL) << (4U * 2UL)) | \
122 … ((ADC_CFGR_EXTSEL) << (4U * 3UL)) )
4003 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
4049 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
4058 & (ADC_REG_TRIG_SOURCE_MASK >> shift_exten) & ADC_CFGR_EXTSEL) in LL_ADC_REG_GetTriggerSource()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_adc.h136 #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U *…
137 … ((ADC_CFGR_EXTSEL) << (4U * 1UL)) | \
138 … ((ADC_CFGR_EXTSEL) << (4U * 2UL)) | \
139 … ((ADC_CFGR_EXTSEL) << (4U * 3UL)) )
3114 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3156 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3165 & (ADC_REG_TRIG_SOURCE_MASK >> shift_exten) & ADC_CFGR_EXTSEL) in LL_ADC_REG_GetTriggerSource()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_adc.h123 #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U * …
124 … ((ADC_CFGR_EXTSEL) << (4U * 1UL)) | \
125 … ((ADC_CFGR_EXTSEL) << (4U * 2UL)) | \
126 … ((ADC_CFGR_EXTSEL) << (4U * 3UL)) )
3951 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3993 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
4002 & (ADC_REG_TRIG_SOURCE_MASK >> shift_exten) & ADC_CFGR_EXTSEL) in LL_ADC_REG_GetTriggerSource()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_adc.h123 #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U * …
124 … ((ADC_CFGR_EXTSEL) << (4U * 1UL)) | \
125 … ((ADC_CFGR_EXTSEL) << (4U * 2UL)) | \
126 … ((ADC_CFGR_EXTSEL) << (4U * 3UL)) )
3920 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3959 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3968 & (ADC_REG_TRIG_SOURCE_MASK >> shift_exten) & ADC_CFGR_EXTSEL) in LL_ADC_REG_GetTriggerSource()
Dstm32l4xx_hal_adc_ex.h461 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
468 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_adc.h123 #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U * …
124 … ((ADC_CFGR_EXTSEL) << (4U * 1UL)) | \
125 … ((ADC_CFGR_EXTSEL) << (4U * 2UL)) | \
126 … ((ADC_CFGR_EXTSEL) << (4U * 3UL)) )
3694 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3733 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3742 & (ADC_REG_TRIG_SOURCE_MASK >> shift_exten) & ADC_CFGR_EXTSEL) in LL_ADC_REG_GetTriggerSource()
Dstm32l5xx_hal_adc_ex.h461 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
468 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_adc.h134 #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U *…
135 … ((ADC_CFGR_EXTSEL) << (4U * 1UL)) | \
136 … ((ADC_CFGR_EXTSEL) << (4U * 2UL)) | \
137 … ((ADC_CFGR_EXTSEL) << (4U * 3UL)) )
3409 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3461 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3470 & (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR_EXTSEL) in LL_ADC_REG_GetTriggerSource()
Dstm32wbxx_hal_adc_ex.h276 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_adc.h123 #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U * …
124 … ((ADC_CFGR_EXTSEL) << (4U * 1UL)) | \
125 … ((ADC_CFGR_EXTSEL) << (4U * 2UL)) | \
126 … ((ADC_CFGR_EXTSEL) << (4U * 3UL)) )
4604 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
4671 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
4680 & (ADC_REG_TRIG_SOURCE_MASK >> shift_exten) & ADC_CFGR_EXTSEL) in LL_ADC_REG_GetTriggerSource()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_adc_ex.h381 #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \ macro
394 #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \ macro
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_adc.c939 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
1215 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
1234 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_adc.h134 #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U *…
135 … ((ADC_CFGR_EXTSEL) << (4U * 1UL)) | \
136 … ((ADC_CFGR_EXTSEL) << (4U * 2UL)) | \
137 … ((ADC_CFGR_EXTSEL) << (4U * 3UL)) )
3859 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3903 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3912 & (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR_EXTSEL) in LL_ADC_REG_GetTriggerSource()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_adc.c885 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
1149 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()
1168 ADC_CFGR_EXTSEL in LL_ADC_REG_Init()

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