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Searched refs:ADC_CFGR1_EXTSEL_0 (Results 1 – 25 of 94) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_adc_ex.h57 #define ADC_EXTERNALTRIGCONV_T21_CC2 (ADC_CFGR1_EXTSEL_0)
59 #define ADC_EXTERNALTRIGCONV_T2_CC4 (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0)
62 …_EXTERNALTRIGCONV_EXT_IT11 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0)
83 #define ADC_EXTERNALTRIGCONV_T2_CC3 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0)
Dstm32l0xx_ll_adc.h537 #define LL_ADC_REG_TRIG_EXT_TIM21_CH2 (ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) …
539 #define LL_ADC_REG_TRIG_EXT_TIM2_CH4 (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_…
542 …TRIG_EXT_EXTI_LINE11 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TR…
551 #define LL_ADC_REG_TRIG_EXT_TIM2_CH3 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_…
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_adc.h1026 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /…
1034 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 \
1042 #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0 \
1052 … | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular
1061 … | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular
1070 … | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular
1078 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 \
1085 #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_0 \
1094 … | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular
1103 … | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_adc.h1215 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) …
1217 #define LL_ADC_REG_TRIG_EXT_TIM2_CH2 (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT…
1219 #define LL_ADC_REG_TRIG_EXT_TIM4_CH4 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT…
1221 …EG_TRIG_EXT_TIM8_TRGO (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0
1224 #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO (ADC_CFGR1_EXTSEL_3 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT…
1226 …EG_TRIG_EXT_TIM2_TRGO (ADC_CFGR1_EXTSEL_3 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0
1229 …EG_TRIG_EXT_TIM6_TRGO (ADC_CFGR1_EXTSEL_3 | ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0
1234 …| ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) …
1237 …EG_TRIG_EXT_LPTIM2_CH1 (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0
1240 …EG_TRIG_EXT_LPTIM4_OUT (ADC_CFGR1_EXTSEL_4 | ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_adc.h457 #define ADC1_2_EXTERNALTRIG_T1_CC4 ((uint32_t)ADC_CFGR1_EXTSEL_0)
459 #define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0))
Dstm32f0xx_ll_adc.h463 #define LL_ADC_REG_TRIG_EXT_TIM1_CH4 (ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) …
465 #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_…
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_adc.h651 …TRIG_EXT_TIM1_CH4 ( ADC_CFGR1_EXTSEL_0 | ADC_REG_TR…
653 …TRIG_EXT_TIM2_CH4 ( ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TR…
654 …TRIG_EXT_TIM2_CH3 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TR…
655 …TRIG_EXT_EXTI_LINE11 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TR…
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_adc.h756 #define LL_ADC_REG_TRIG_EXT_TIM1_CH4 (ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /…
763 #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 \
770 #define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0 \
775 … | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_adc.h763 #define LL_ADC_REG_TRIG_EXT_TIM1_CH4 (ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*…
773 #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | \
784 #define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0 | \
795ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_adc.h723 #define LL_ADC_REG_TRIG_EXT_TIM1_CH4 (ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*…
730 #define LL_ADC_REG_TRIG_EXT_LPTIM1_CH1 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0 \
736 … | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_adc.h780 #define LL_ADC_REG_TRIG_EXT_TIM1_CH4 (ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< …
789 #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 \
794 … | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_adc.h939 …TRIG_EXT_TIM1_CH4 ( ADC_CFGR1_EXTSEL_0 | ADC_REG_TR…
941 …TRIG_EXT_TIM2_CH4 ( ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TR…
942 …TRIG_EXT_TIM2_CH3 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TR…
943 …TRIG_EXT_EXTI_LINE11 (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TR…
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h1113 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
1183 #define ADC_CFGR_EXTSEL_0 ADC_CFGR1_EXTSEL_0
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h1098 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
1168 #define ADC_CFGR_EXTSEL_0 ADC_CFGR1_EXTSEL_0
Dstm32wb15xx.h1113 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
1183 #define ADC_CFGR_EXTSEL_0 ADC_CFGR1_EXTSEL_0
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h643 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
Dstm32f030x8.h659 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
Dstm32f070x6.h688 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h749 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
Dstm32l010x8.h707 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
Dstm32l010xb.h712 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
Dstm32l011xx.h719 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
Dstm32l021xx.h740 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
Dstm32l031xx.h728 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro
Dstm32l051xx.h763 #define ADC_CFGR1_EXTSEL_0 (0x1UL << ADC_CFGR1_EXTSEL_Pos) /*!< 0x00000040 */ macro

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