ADC_CFGR1_AWD1CH_2 (reference) in projects: hal_stm32-latest

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Searched refs:ADC_CFGR1_AWD1CH_2 (Results 1 – 25 of 70) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
D	stm32c0xx_ll_adc.h	125 #define ADC_CHANNEL_4_NUMBER (ADC_CFGR1_AWD1CH_2) 126 #define ADC_CHANNEL_5_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_0) 127 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 128 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 133 #define ADC_CHANNEL_12_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2) 134 #define ADC_CHANNEL_13_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 135 #define ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 136 #define ADC_CHANNEL_15_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| \ 143 #define ADC_CHANNEL_20_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_2 ) 144 #define ADC_CHANNEL_21_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… [all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
D	stm32wlxx_ll_adc.h	127 #define ADC_CHANNEL_4_NUMBER (ADC_CFGR1_AWD1CH_2) 128 #define ADC_CHANNEL_5_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_0) 129 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 130 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 135 #define ADC_CHANNEL_12_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2) 136 #define ADC_CHANNEL_13_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 137 #define ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 138 #define ADC_CHANNEL_15_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| \
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
D	stm32wbaxx_ll_adc.h	125 #define ADC_CHANNEL_4_NUMBER (ADC_CFGR1_AWD1CH_2) 126 #define ADC_CHANNEL_5_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_0) 127 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 128 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 133 #define ADC_CHANNEL_12_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2) 134 #define ADC_CHANNEL_13_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 135 #define ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 136 #define ADC_CHANNEL_15_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| \
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
D	stm32u0xx_ll_adc.h	125 #define ADC_CHANNEL_4_NUMBER (ADC_CFGR1_AWD1CH_2) 126 #define ADC_CHANNEL_5_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_0) 127 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 128 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 133 #define ADC_CHANNEL_12_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2) 134 #define ADC_CHANNEL_13_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 135 #define ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 136 #define ADC_CHANNEL_15_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| \
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
D	stm32g0xx_ll_adc.h	127 #define ADC_CHANNEL_4_NUMBER (ADC_CFGR1_AWD1CH_2) 128 #define ADC_CHANNEL_5_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_0) 129 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 130 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 135 #define ADC_CHANNEL_12_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2) 136 #define ADC_CHANNEL_13_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 137 #define ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 138 #define ADC_CHANNEL_15_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| \
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
D	stm32u5xx_ll_adc.h	281 #define ADC_CHANNEL_4_NUMBER (ADC_CFGR1_AWD1CH_2) 282 #define ADC_CHANNEL_5_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_0) 283 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 284 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 289 #define ADC_CHANNEL_12_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2) 290 #define ADC_CHANNEL_13_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_0) 291 #define ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 292 #define ADC_CHANNEL_15_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| A… 298 #define ADC_CHANNEL_20_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_2 ) 299 #define ADC_CHANNEL_21_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_0) [all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
D	stm32n6xx_ll_adc.h	311 #define ADC_CHANNEL_4_NUMBER (ADC_CFGR1_AWD1CH_2) 312 #define ADC_CHANNEL_5_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_0) 313 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 314 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 319 #define ADC_CHANNEL_12_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2) 320 #define ADC_CHANNEL_13_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 321 #define ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD… 322 #define ADC_CHANNEL_15_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| \
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
D	stm32f030x6.h	`681 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 692 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f030x8.h	`697 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 708 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f070x6.h	`726 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 737 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f031x6.h	`691 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 702 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f030xc.h	`713 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 724 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f038xx.h	`690 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 701 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f070xb.h	`749 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 760 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f058xx.h	`796 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 807 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f051x8.h	`797 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 808 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f071xb.h	`831 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 842 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f042x6.h	`860 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 871 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f048xx.h	`860 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 871 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f072xb.h	`935 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 946 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f091xc.h	`917 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 928 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
D	stm32f098xx.h	`917 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 928 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2)`
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
D	stm32wb1mxx.h	`1154 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 1224 #define ADC_CFGR_AWD1CH_2 ADC_CFGR1_AWD1CH_2`
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
D	stm32wb10xx.h	`1139 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 1209 #define ADC_CFGR_AWD1CH_2 ADC_CFGR1_AWD1CH_2`
D	stm32wb15xx.h	`1154 #define ADC_CFGR1_AWD1CH_2 (0x04UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x10000000 / macro 1224 #define ADC_CFGR_AWD1CH_2 ADC_CFGR1_AWD1CH_2`

12 3

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