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Searched refs:ADC_AWD_CR3_REGOFFSET (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_adc.h189 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
196 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
209 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET + (1UL << ADC_AWD_CRX_REGOFFSET_B…
775 #define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR3_REGOFFSET) /*!<…
3894 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_ConfigAnalogWDThresholds()
3977 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_SetAnalogWDThresholds()
4023 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_adc.h187 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
194 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
207 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET + (1UL << ADC_AWD_CRX_REGOFFSET_B…
906 … | ADC_AWD_CR3_REGOFFSET) /*!< ADC analog watchdog number 3 */
3819 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_ConfigAnalogWDThresholds()
3882 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_SetAnalogWDThresholds()
3929 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_adc.h190 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
197 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
210 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET + (1UL << ADC_AWD_CRX_REGOFFSET_B…
945 … | ADC_AWD_CR3_REGOFFSET) /*!< ADC analog watchdog number 3 */
4151 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_ConfigAnalogWDThresholds()
4234 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_SetAnalogWDThresholds()
4281 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_adc.h197 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
204 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
217 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET + (1UL << ADC_AWD_CRX_REGOFFSET_B…
964 … | ADC_AWD_CR3_REGOFFSET) /*!< ADC analog watchdog number 3 */
4242 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_ConfigAnalogWDThresholds()
4324 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_SetAnalogWDThresholds()
4370 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_adc.h190 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
197 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
210 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET + (1UL << ADC_AWD_CRX_REGOFFSET_B…
965 … | ADC_AWD_CR3_REGOFFSET) /*!< ADC analog watchdog number 3 */
4219 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_ConfigAnalogWDThresholds()
4302 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_SetAnalogWDThresholds()
4349 + ((ADC_AWD_CR3_REGOFFSET & AWDy) in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_adc.h417 #define ADC_AWD_CR3_REGOFFSET (0x02000000UL) macro
424 …_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
436 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
1575 #define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR3_REGOFFSET) /*!<…
6747 …preg = __ADC_PTR_REG_OFFSET(ADCx->AWD2CR, ((AWDy & ADC_AWD_CR3_REGOFFSET)) >> (ADC_AWD_CRX_REGOFFS… in LL_ADC_SetAnalogWDMonitChannels()
7049 … + ((ADC_AWD_CR3_REGOFFSET & AWDy) >> (ADC_AWD_CRX_REGOFFSET_POS + 1UL))); in LL_ADC_SetAnalogWDThresholds()
7112 … + ((ADC_AWD_CR3_REGOFFSET & AWDy) >> (ADC_AWD_CRX_REGOFFSET_POS + 1UL))); in LL_ADC_GetAnalogWDThresholds()
7223 … + ((ADC_AWD_CR3_REGOFFSET & AWDy) >> (ADC_AWD_CRX_REGOFFSET_POS + 1UL))); in LL_ADC_ConfigAnalogWDThresholds()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_adc.h335 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
342 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
354 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
1541 … | ADC_AWD_CR3_REGOFFSET) /*!< ADC analog watchdog number 3 */
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_adc.h304 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
311 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
323 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
1493 … | ADC_AWD_CR3_REGOFFSET) /*!< ADC analog watchdog number 3 */
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_adc.h313 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
320 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
331 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
1108 #define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR3_REGOFFSET) /*!<…
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_adc.h312 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
319 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
331 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
1483 … | ADC_AWD_CR3_REGOFFSET) /*!< ADC analog watchdog number 3 */
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_adc.h313 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
320 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
332 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
1441 … | ADC_AWD_CR3_REGOFFSET) /*!< ADC analog watchdog number 3 */
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_adc.h313 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
320 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
332 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
1412 … | ADC_AWD_CR3_REGOFFSET) /*!< ADC analog watchdog number 3 */
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_adc.h351 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
358 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
375 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
1235 #define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR3_REGOFFSET) /*!<…
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_adc.h312 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
319 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
331 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
1762 … | ADC_AWD_CR3_REGOFFSET) /*!< ADC analog watchdog number 3 */
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_adc.h309 #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) macro
316 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
327 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
1278 #define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR3_REGOFFSET) /*!<…
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_adc.h324 #define ADC_AWD_CR3_REGOFFSET ((uint32_t)0x00200000U) macro
331 …_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3_REGOFFSET)
340 #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET)
1261 #define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR3_REGOFFSET) /*!<…