Home
last modified time | relevance | path

Searched refs:ADC_AWD3HTR_HTR_Pos (Results 1 – 4 of 4) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h6246 #define ADC_AWD3HTR_HTR_Pos (0U) macro
6247 #define ADC_AWD3HTR_HTR_Msk (0x007FFFFFUL << ADC_AWD3HTR_HTR_Pos) /*!< 0x007FFFFF */
6249 #define ADC_AWD3HTR_HTR_0 (0x000001UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000001 */
6250 #define ADC_AWD3HTR_HTR_1 (0x000002UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000002 */
6251 #define ADC_AWD3HTR_HTR_2 (0x000004UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000004 */
6252 #define ADC_AWD3HTR_HTR_3 (0x000008UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000008 */
6253 #define ADC_AWD3HTR_HTR_4 (0x000010UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000010 */
6254 #define ADC_AWD3HTR_HTR_5 (0x000020UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000020 */
6255 #define ADC_AWD3HTR_HTR_6 (0x000040UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000040 */
6256 #define ADC_AWD3HTR_HTR_7 (0x000080UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000080 */
[all …]
Dstm32n657xx.h6745 #define ADC_AWD3HTR_HTR_Pos (0U) macro
6746 #define ADC_AWD3HTR_HTR_Msk (0x007FFFFFUL << ADC_AWD3HTR_HTR_Pos) /*!< 0x007FFFFF */
6748 #define ADC_AWD3HTR_HTR_0 (0x000001UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000001 */
6749 #define ADC_AWD3HTR_HTR_1 (0x000002UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000002 */
6750 #define ADC_AWD3HTR_HTR_2 (0x000004UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000004 */
6751 #define ADC_AWD3HTR_HTR_3 (0x000008UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000008 */
6752 #define ADC_AWD3HTR_HTR_4 (0x000010UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000010 */
6753 #define ADC_AWD3HTR_HTR_5 (0x000020UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000020 */
6754 #define ADC_AWD3HTR_HTR_6 (0x000040UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000040 */
6755 #define ADC_AWD3HTR_HTR_7 (0x000080UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000080 */
[all …]
Dstm32n655xx.h6667 #define ADC_AWD3HTR_HTR_Pos (0U) macro
6668 #define ADC_AWD3HTR_HTR_Msk (0x007FFFFFUL << ADC_AWD3HTR_HTR_Pos) /*!< 0x007FFFFF */
6670 #define ADC_AWD3HTR_HTR_0 (0x000001UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000001 */
6671 #define ADC_AWD3HTR_HTR_1 (0x000002UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000002 */
6672 #define ADC_AWD3HTR_HTR_2 (0x000004UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000004 */
6673 #define ADC_AWD3HTR_HTR_3 (0x000008UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000008 */
6674 #define ADC_AWD3HTR_HTR_4 (0x000010UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000010 */
6675 #define ADC_AWD3HTR_HTR_5 (0x000020UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000020 */
6676 #define ADC_AWD3HTR_HTR_6 (0x000040UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000040 */
6677 #define ADC_AWD3HTR_HTR_7 (0x000080UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000080 */
[all …]
Dstm32n647xx.h6324 #define ADC_AWD3HTR_HTR_Pos (0U) macro
6325 #define ADC_AWD3HTR_HTR_Msk (0x007FFFFFUL << ADC_AWD3HTR_HTR_Pos) /*!< 0x007FFFFF */
6327 #define ADC_AWD3HTR_HTR_0 (0x000001UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000001 */
6328 #define ADC_AWD3HTR_HTR_1 (0x000002UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000002 */
6329 #define ADC_AWD3HTR_HTR_2 (0x000004UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000004 */
6330 #define ADC_AWD3HTR_HTR_3 (0x000008UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000008 */
6331 #define ADC_AWD3HTR_HTR_4 (0x000010UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000010 */
6332 #define ADC_AWD3HTR_HTR_5 (0x000020UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000020 */
6333 #define ADC_AWD3HTR_HTR_6 (0x000040UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000040 */
6334 #define ADC_AWD3HTR_HTR_7 (0x000080UL << ADC_AWD3HTR_HTR_Pos) /*!< 0x00000080 */
[all …]