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Searched refs:ADC_AWD1HTR_HTR_Pos (Results 1 – 4 of 4) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h6127 #define ADC_AWD1HTR_HTR_Pos (0U) macro
6128 #define ADC_AWD1HTR_HTR_Msk (0x007FFFFFUL << ADC_AWD1HTR_HTR_Pos) /*!< 0x007FFFFF */
6130 #define ADC_AWD1HTR_HTR_0 (0x000001UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000001 */
6131 #define ADC_AWD1HTR_HTR_1 (0x000002UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000002 */
6132 #define ADC_AWD1HTR_HTR_2 (0x000004UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000004 */
6133 #define ADC_AWD1HTR_HTR_3 (0x000008UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000008 */
6134 #define ADC_AWD1HTR_HTR_4 (0x000010UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000010 */
6135 #define ADC_AWD1HTR_HTR_5 (0x000020UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000020 */
6136 #define ADC_AWD1HTR_HTR_6 (0x000040UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000040 */
6137 #define ADC_AWD1HTR_HTR_7 (0x000080UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000080 */
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Dstm32n657xx.h6626 #define ADC_AWD1HTR_HTR_Pos (0U) macro
6627 #define ADC_AWD1HTR_HTR_Msk (0x007FFFFFUL << ADC_AWD1HTR_HTR_Pos) /*!< 0x007FFFFF */
6629 #define ADC_AWD1HTR_HTR_0 (0x000001UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000001 */
6630 #define ADC_AWD1HTR_HTR_1 (0x000002UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000002 */
6631 #define ADC_AWD1HTR_HTR_2 (0x000004UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000004 */
6632 #define ADC_AWD1HTR_HTR_3 (0x000008UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000008 */
6633 #define ADC_AWD1HTR_HTR_4 (0x000010UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000010 */
6634 #define ADC_AWD1HTR_HTR_5 (0x000020UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000020 */
6635 #define ADC_AWD1HTR_HTR_6 (0x000040UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000040 */
6636 #define ADC_AWD1HTR_HTR_7 (0x000080UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000080 */
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Dstm32n655xx.h6548 #define ADC_AWD1HTR_HTR_Pos (0U) macro
6549 #define ADC_AWD1HTR_HTR_Msk (0x007FFFFFUL << ADC_AWD1HTR_HTR_Pos) /*!< 0x007FFFFF */
6551 #define ADC_AWD1HTR_HTR_0 (0x000001UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000001 */
6552 #define ADC_AWD1HTR_HTR_1 (0x000002UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000002 */
6553 #define ADC_AWD1HTR_HTR_2 (0x000004UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000004 */
6554 #define ADC_AWD1HTR_HTR_3 (0x000008UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000008 */
6555 #define ADC_AWD1HTR_HTR_4 (0x000010UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000010 */
6556 #define ADC_AWD1HTR_HTR_5 (0x000020UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000020 */
6557 #define ADC_AWD1HTR_HTR_6 (0x000040UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000040 */
6558 #define ADC_AWD1HTR_HTR_7 (0x000080UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000080 */
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Dstm32n647xx.h6205 #define ADC_AWD1HTR_HTR_Pos (0U) macro
6206 #define ADC_AWD1HTR_HTR_Msk (0x007FFFFFUL << ADC_AWD1HTR_HTR_Pos) /*!< 0x007FFFFF */
6208 #define ADC_AWD1HTR_HTR_0 (0x000001UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000001 */
6209 #define ADC_AWD1HTR_HTR_1 (0x000002UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000002 */
6210 #define ADC_AWD1HTR_HTR_2 (0x000004UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000004 */
6211 #define ADC_AWD1HTR_HTR_3 (0x000008UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000008 */
6212 #define ADC_AWD1HTR_HTR_4 (0x000010UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000010 */
6213 #define ADC_AWD1HTR_HTR_5 (0x000020UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000020 */
6214 #define ADC_AWD1HTR_HTR_6 (0x000040UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000040 */
6215 #define ADC_AWD1HTR_HTR_7 (0x000080UL << ADC_AWD1HTR_HTR_Pos) /*!< 0x00000080 */
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