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Searched refs:WWDG_CR_WDGA (Results 1 – 25 of 325) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_wwdg.h125 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
136 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_wwdg.h125 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
136 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_wwdg.h125 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
136 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
Dstm32f7xx_hal_wwdg.h182 …L_WWDG_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, WWDG_CR_WDGA)
/hal_stm32-3.7.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_wwdg.h125 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
136 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_wwdg.h125 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
136 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_wwdg.h125 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
136 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_wwdg.h125 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
136 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_wwdg.h125 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
136 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_wwdg.h125 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
136 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_wwdg.h129 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); in LL_WWDG_Enable()
140 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); in LL_WWDG_IsEnabled()
/hal_stm32-3.7.0/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_hal_wwdg.c210 WRITE_REG(hwwdg->Instance->CR, (WWDG_CR_WDGA | hwwdg->Init.Counter)); in HAL_WWDG_Init()
/hal_stm32-3.7.0/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_wwdg.c185 WRITE_REG(hwwdg->Instance->CR, (WWDG_CR_WDGA | hwwdg->Init.Counter)); in HAL_WWDG_Init()
/hal_stm32-3.7.0/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_wwdg.c210 WRITE_REG(hwwdg->Instance->CR, (WWDG_CR_WDGA | hwwdg->Init.Counter)); in HAL_WWDG_Init()

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