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Searched refs:TIM_ECR_IBLK_Msk (Results 1 – 25 of 30) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_tim_ex.c3072 TIM_ECR_IDIR_Msk | TIM_ECR_IBLK_Msk | TIM_ECR_FIDX_Msk | TIM_ECR_IPOS_Msk, in HAL_TIMEx_ConfigEncoderIndex()
3090 TIM_ECR_IDIR_Msk | TIM_ECR_IBLK_Msk | TIM_ECR_FIDX_Msk | TIM_ECR_IPOS_Msk, in HAL_TIMEx_ConfigEncoderIndex()
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_tim_ex.c2923 TIM_ECR_IDIR_Msk | TIM_ECR_IBLK_Msk | TIM_ECR_FIDX_Msk | TIM_ECR_IPOS_Msk, in HAL_TIMEx_ConfigEncoderIndex()
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_tim_ex.c2990 TIM_ECR_IDIR_Msk | TIM_ECR_IBLK_Msk | TIM_ECR_FIDX_Msk | TIM_ECR_IPOS_Msk, in HAL_TIMEx_ConfigEncoderIndex()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_tim_ex.c2898 TIM_ECR_IDIR_Msk | TIM_ECR_IBLK_Msk | TIM_ECR_FIDX_Msk | TIM_ECR_IPOS_Msk, in HAL_TIMEx_ConfigEncoderIndex()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9072 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
9073 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32wba52xx.h13239 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
13240 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32wba54xx.h13947 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
13948 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32wba55xx.h13965 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
13966 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h7519 #define TIM_ECR_IBLK_Msk (0x5UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
7520 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32h523xx.h9960 #define TIM_ECR_IBLK_Msk (0x5UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
9961 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32h562xx.h10666 #define TIM_ECR_IBLK_Msk (0x5UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
10667 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32h533xx.h10368 #define TIM_ECR_IBLK_Msk (0x5UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
10369 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32h563xx.h12750 #define TIM_ECR_IBLK_Msk (0x5UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
12751 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32h573xx.h13158 #define TIM_ECR_IBLK_Msk (0x5UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
13159 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h20349 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
20350 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32h7s3xx.h21232 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
21233 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32h7s7xx.h21664 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
21665 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32h7r7xx.h20779 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
20780 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h10648 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
10649 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32u545xx.h11048 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
11049 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32u575xx.h11682 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
11683 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32u585xx.h12131 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
12132 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32u5f7xx.h13490 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
13491 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32u595xx.h11992 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
11993 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…
Dstm32u5a5xx.h12441 #define TIM_ECR_IBLK_Msk (0x3UL << TIM_ECR_IBLK_Pos) /*!< 0x00000018… macro
12442 #define TIM_ECR_IBLK TIM_ECR_IBLK_Msk /*!<IBLK[1:0] b…

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