Searched refs:TIM_AF1_ETRSEL_1 (Results 1 – 16 of 16) sorted by relevance
110 #define TIM_TIM1_ETR_ADC1_AWD1 (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!…113 #define TIM_TIM1_ETR_ADC2_AWD1 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) /*!…114 #define TIM_TIM1_ETR_ADC2_AWD2 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!…119 #define TIM_TIM2_ETR_LTDC_HSYNC (TIM_AF1_ETRSEL_1) /*!…122 #define TIM_TIM2_ETR_GFXTIM_TE (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) /*!…123 #define TIM_TIM2_ETR_DCMIPP_VSYNC (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!…125 #define TIM_TIM2_ETR_TIM3_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1) /*!…126 #define TIM_TIM2_ETR_TIM4_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!…132 #define TIM_TIM3_ETR_LTDC_HSYNC (TIM_AF1_ETRSEL_1) /*!…133 #define TIM_TIM3_ETR_GFXTIM_TE (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) /*!…[all …]
1033 #define LL_TIM_TIM1_ETRSOURCE_ADC1_AWD1 (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) …1036 #define LL_TIM_TIM1_ETRSOURCE_ADC2_AWD1 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) …1037 #define LL_TIM_TIM1_ETRSOURCE_ADC2_AWD2 (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0…1048 #define LL_TIM_TIM2_ETRSOURCE_LTDC_HSYNC TIM_AF1_ETRSEL_1 …1051 #define LL_TIM_TIM2_ETRSOURCE_GFXTIM_TE (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) …1052 #define LL_TIM_TIM2_ETRSOURCE_DCMIPP_VSYNC (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0…1054 #define LL_TIM_TIM2_ETRSOURCE_TIM3_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1) …1055 #define LL_TIM_TIM2_ETRSOURCE_TIM4_ETR (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0…1067 #define LL_TIM_TIM3_ETRSOURCE_LTDC_HSYNC TIM_AF1_ETRSEL_1 …1068 #define LL_TIM_TIM3_ETRSOURCE_GFXTIM_TE (TIM_AF1_ETRSEL_2 | TIM_AF1_ETRSEL_1) …[all …]
111 #define TIM_TIM1_ETR_COMP2 TIM_AF1_ETRSEL_1 /*!…113 #define TIM_TIM1_ETR_ADC4_AWD1 (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!…119 #define TIM_TIM2_ETR_COMP2 TIM_AF1_ETRSEL_1 /*!…122 #define TIM_TIM2_ETR_LSE (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!…126 #define TIM_TIM3_ETR_COMP2 TIM_AF1_ETRSEL_1 /*!…129 #define TIM_TIM3_ETR_ADC4_AWD1 (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1| TIM_AF1_ETRSEL_0) /*!…
1027 #define LL_TIM_TIM1_ETRSOURCE_COMP2 TIM_AF1_ETRSEL_1 …1030 #define LL_TIM_TIM1_ETRSOURCE_ADC4_AWD1 (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) …1043 #define LL_TIM_TIM2_ETRSOURCE_COMP2 TIM_AF1_ETRSEL_1 …1047 #define LL_TIM_TIM2_ETRSOURCE_LSE (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)…1058 #define LL_TIM_TIM3_ETRSOURCE_COMP2 TIM_AF1_ETRSEL_1 …1062 #define LL_TIM_TIM3_ETRSOURCE_ADC4_AWD1 (TIM_AF1_ETRSEL_3 | TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0)…
89 #define TIM_TIM1_ETR_ADC1_AWD1 (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM1_ETR is conn…95 #define TIM_TIM2_ETR_LSE (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< TIM2_ETR is conn…
978 #define LL_TIM_ETRSOURCE_ADC1_AWD1 (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< ETR inp…982 #define LL_TIM_ETRSOURCE_LSE (TIM_AF1_ETRSEL_1 | TIM_AF1_ETRSEL_0) /*!< ETR inp…
6065 #define TIM_AF1_ETRSEL_1 (0x2UL << TIM_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
5905 #define TIM_AF1_ETRSEL_1 (0x2UL << TIM_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
8954 #define TIM_AF1_ETRSEL_1 (0x2UL << TIM_AF1_ETRSEL_Pos) /*!< 0x00008000… macro
13121 #define TIM_AF1_ETRSEL_1 (0x2UL << TIM_AF1_ETRSEL_Pos) /*!< 0x00008000… macro
13829 #define TIM_AF1_ETRSEL_1 (0x2UL << TIM_AF1_ETRSEL_Pos) /*!< 0x00008000… macro
13847 #define TIM_AF1_ETRSEL_1 (0x2UL << TIM_AF1_ETRSEL_Pos) /*!< 0x00008000… macro
20278 #define TIM_AF1_ETRSEL_1 (0x2UL << TIM_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
21161 #define TIM_AF1_ETRSEL_1 (0x2UL << TIM_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
21593 #define TIM_AF1_ETRSEL_1 (0x2UL << TIM_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
20708 #define TIM_AF1_ETRSEL_1 (0x2UL << TIM_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
