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Searched refs:TAMP_MISR_ITAMP5MF_Msk (Results 1 – 25 of 85) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h5449 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
5450 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g030xx.h5251 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
5252 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g050xx.h5297 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
5298 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g031xx.h5497 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
5498 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g041xx.h5795 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
5796 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g051xx.h5872 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
5873 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g061xx.h6170 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
6171 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g071xx.h6260 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
6261 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g081xx.h6558 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
6559 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g0b0xx.h6565 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
6566 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g0b1xx.h7704 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
7705 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g0c1xx.h8002 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
8003 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
/hal_stm32-3.7.0/stm32cube/stm32wlxx/soc/
Dstm32wle5xx.h7685 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
7686 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32wle4xx.h7685 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
7686 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32wl54xx.h8802 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
8803 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32wl5mxx.h8802 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
8803 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32wl55xx.h8802 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
8803 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h7961 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000… macro
7962 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
/hal_stm32-3.7.0/stm32cube/stm32g4xx/soc/
Dstm32gbk1cb.h8909 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
8910 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g431xx.h8937 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
8938 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g441xx.h9167 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
9168 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g4a1xx.h9579 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
9580 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g491xx.h9349 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
9350 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
Dstm32g471xx.h9521 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000 */ macro
9522 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk
/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h10425 #define TAMP_MISR_ITAMP5MF_Msk (0x1UL << TAMP_MISR_ITAMP5MF_Pos) /*!< 0x00100000… macro
10426 #define TAMP_MISR_ITAMP5MF TAMP_MISR_ITAMP5MF_Msk

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