1 /*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/branches/P10164613/issue_2029/firmware/public_inc/common_types.h#2 $*/
2 /*Version_INFO
3 V2  --> Original version is 1.30a-SOW05PatchV6_2
4 V2  --> combined patch case 01641860
5 */
6 /**
7  ********************************************************************************
8  * @file    common_types.h
9  * @brief   This file contains common includes for BLE FW LL.
10  ******************************************************************************
11  * @copy
12  * This Synopsys DWC Bluetooth Low Energy Combo Link Layer/MAC software and
13  * associated documentation ( hereinafter the "Software") is an unsupported
14  * proprietary work of Synopsys, Inc. unless otherwise expressly agreed to in
15  * writing between Synopsys and you. The Software IS NOT an item of Licensed
16  * Software or a Licensed Product under any End User Software License Agreement
17  * or Agreement for Licensed Products with Synopsys or any supplement thereto.
18  * Synopsys is a registered trademark of Synopsys, Inc. Other names included in
19  * the SOFTWARE may be the trademarks of their respective owners.
20  *
21  * Synopsys MIT License:
22  * Copyright (c) 2020-Present Synopsys, Inc
23  *
24  * Permission is hereby granted, free of charge, to any person obtaining a copy of
25  * the Software), to deal in the Software without restriction, including without
26  * limitation the rights to use, copy, modify, merge, publish, distribute,
27  * sublicense, and/or sell copies of the Software, and to permit persons to whom
28  * the Software is furnished to do so, subject to the following conditions:
29  *
30  * The above copyright notice and this permission notice shall be included in all
31  * copies or substantial portions of the Software.
32  *
33  * THIS SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
34  * IMPLIED, INCLUDING, BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
35  * FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT. IN NO EVENT SHALL THE
36  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
37  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT, OR OTHERWISE ARISING FROM,
38  * OUT OF, OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
39  *
40  * */
41 
42 /* Define to prevent recursive inclusion -------------------------------------*/
43 
44 #ifndef COMMON_TYPES_H_
45 #define COMMON_TYPES_H_
46 #include "_40nm_reg_files/DWC_ble154combo.h"
47 #include "bsp.h"
48 #include "ll_fw_config.h"
49 #include "mem_intf.h"
50 #include "os_wrapper.h"
51 
52 
53 /********************************************************************** */
54 /****************** BLE MAC COMBO Configurations*********************** */
55 /********************************************************************** */
56 #ifdef BLE
57 #define SUPPORT_BLE									1
58 #else
59 #define SUPPORT_BLE									0
60 #endif
61 
62 #ifdef MAC
63 #define SUPPORT_MAC									1
64 #else
65 #define SUPPORT_MAC									0
66 #endif
67 #ifdef ANT_ROLE
68 #define SUPPORT_ANT								    1
69 
70 #ifdef SUPPORT_ANT_TESTING
71 #define SUPPORT_ANT_HCI_UART								    1
72 #else
73 #define SUPPORT_ANT_HCI_UART								    0
74 #endif /* SUPPORT_ANT_HCI_UART*/
75 
76 #else
77 #define SUPPORT_ANT								    0
78 #define SUPPORT_ANT_HCI_UART                                0
79 #endif
80 
81 #ifdef MAC_LAYER
82 #define MAC_LAYER_BUILD 1
83 #else
84 #define MAC_LAYER_BUILD 0
85 #endif
86 
87 #ifdef SUPPORT_MAC_HCI_UART
88 #define SUPPORT_MAC_HCI_UART       1
89 #else
90 #define SUPPORT_MAC_HCI_UART       0
91 #endif
92 
93 #ifdef SUPPORT_AUG_MAC_HCI_UART
94 #define SUPPORT_AUG_MAC_HCI_UART       1
95 #else
96 #define SUPPORT_AUG_MAC_HCI_UART       0
97 #endif
98 
99 #if((!SUPPORT_BLE)&&(SUPPORT_MAC || SUPPORT_AUG_MAC_HCI_UART)&&(RAL_NUMBER_OF_INSTANCE>1))
100 #error "BLE controller must be enabled to support MAC multiple Instances"
101 #endif
102 
103 #if((SUPPORT_MAC)&&(SUPPORT_AUG_MAC_HCI_UART)&&(RAL_NUMBER_OF_INSTANCE<2))
104 #error "RAL_NUMBER_OF_INSTANCE must be 2 to support MAC and Augmented MAC"
105 #endif
106 
107 #if((!SUPPORT_BLE)&&(SUPPORT_MAC)&&(SUPPORT_ANT))
108 #error "BLE controller must be enabled to support MAC and ANT Coexistence"
109 #endif
110 
111 #define SUPPORT_COEXISTENCE							((SUPPORT_BLE&&SUPPORT_MAC) || (SUPPORT_BLE&&SUPPORT_ANT))
112 #define SUPPORT_ANT_COEXISTENCE						(SUPPORT_BLE&&SUPPORT_ANT)
113 /****************** User configuration **********************************/
114 
115 #define SUPPORT_GNRC_SCHDLR_IF	              (1)
116 
117 
118 
119 
120 /********************* Macros **********************************/
121 
122 #ifndef SUCCESS
123 #define		SUCCESS				0
124 #endif
125 #ifndef GENERAL_FAILURE
126 #define		GENERAL_FAILURE		-1
127 #endif
128 #ifndef GENERAL_ERROR_STATUS
129 #define		GENERAL_ERROR_STATUS		0xFF
130 #endif
131 
132 #ifndef TRUE
133 #define TRUE				1
134 #endif /* TRUE */
135 
136 #ifndef FALSE
137 #define FALSE				0
138 #endif /* FALSE */
139 
140 #ifndef NULL
141 #define NULL				((void *)0)
142 #endif	/* NULL */
143 
144 #define MEMSET(ptr_memory, value, memory_size)				ble_memset(ptr_memory, value, memory_size)
145 #define MEMCPY(ptr_destination, ptr_source, memory_size)	ble_memcpy(ptr_destination, ptr_source, memory_size)
146 #define MEMCMP(ptr_destination, ptr_source, memory_size)	ble_memcmp(ptr_destination, ptr_source, memory_size)
147 #define MEMMOV(ptr_destination, ptr_source, memory_size)	ble_memmov(ptr_destination, ptr_source, memory_size)
148 
149 
150 
151 
152 
153 extern os_mutex_id g_ll_lock;
154 #define LL_LOCK()	os_rcrsv_mutex_wait(g_ll_lock,0xffffffff)
155 #define LL_UNLOCK()	os_rcrsv_mutex_release(g_ll_lock)
156 
157 #if SUPPORT_MAC && SUPPORT_OPENTHREAD_1_2
158 /* compiler flag to control supporting of CSL transmitter , RADIO TX at specific time , 1  supported , 0 not supported */
159 #define CONFIG_MAC_CSL_TRANSMITTER_ENABLE                1
160 /* compiler flag to control supporting of CSL receiver , RADIO RX at specific time, 1  supported , 0 not supported */
161 #define CONFIG_MAC_CSL_RECEIVER_ENABLE                   1
162 /* compiler flag to control supporting of Radio security handling */
163 #define SUPPORT_RADIO_SECURITY_OT_1_2                    1
164 /* compiler flag to control supporting of Enhanced Ack Link metrics probing  */
165 #define SUPPORT_ENH_ACK_LINK_METRICS_PROBING_OT_1_2 	 1
166 /* compiler flag to control supporting of Time sync experimental feature of OT 1.2
167  * (it is not a thread 1.2 shall not be added except for with OT 1.2 for testing purpose) */
168 #define SUPPORT_TIME_SYNC_OT_1_2						 1
169 #else
170 #define CONFIG_MAC_CSL_TRANSMITTER_ENABLE                0
171 #define CONFIG_MAC_CSL_RECEIVER_ENABLE                   0
172 #define SUPPORT_RADIO_SECURITY_OT_1_2           		 0
173 #define SUPPORT_ENH_ACK_LINK_METRICS_PROBING_OT_1_2 	 0
174 #define SUPPORT_TIME_SYNC_OT_1_2						 0
175 #endif /*SUPPORT_MAC && SUPPORT_OPENTHREAD_1_2 */
176 
177 /* end of radio activity custom command flag */
178 #define END_OF_RADIO_ACTIVITY_REPORTING				1 /* Enable\Disable end of radio activity reporting feature. Enable:1 - Disable:0 */
179 
180 /* Supported PHYs*/
181 typedef enum {
182 	LE_NO_CHANGE			= 0x00,
183 	LE_1M  					= 0x01,
184 	LE_2M 					= 0x02,
185 	LE_CODED_S8				= 0x03,
186 	LE_CODED 				= 0x04,
187 #if (SUPPORT_LE_POWER_CONTROL)
188 	LE_PHY_UNDEFINED		= 0xFC,
189 	NEW_PHY_CODED_S2		= 0xFD,
190 	NEW_PHY_CODED_S8		= 0xFE,
191 	NEW_PHY_CODED_COMBINED	= 0xFF,
192 #endif /* SUPPORT_LE_POWER_CONTROL */
193 
194 	/* PHY Recommendations - Combined Values */
195 #if ((SUPPORT_CONNECTED_ISOCHRONOUS && SUPPORT_MASTER_CONNECTION) || SUPPORT_BRD_ISOCHRONOUS)
196 	RECOMMEND_1M_2M			= 0x03,
197 	RECOMMEND_1M_CODED		= 0x05,
198 	RECOMMEND_2M_CODED		= 0x06,
199 	RECOMMEND_1M_2M_CODED 	= 0x07,
200 #endif /* ((SUPPORT_CONNECTED_ISOCHRONOUS && SUPPORT_MASTER_CONNECTION) || SUPPORT_BRD_ISOCHRONOUS) */
201 } tx_rx_phy_e;
202 
203 /**
204  * @brief time stamp structure.
205  */
206 typedef struct time_st {
207 	uint32_t time_stamp_base;
208 	uint16_t time_stamp_fine;
209 	uint8_t  overflow_flag;
210 } ble_time_t, *ble_time_p;
211 typedef enum dpslp_state {
212 	DEEP_SLEEP_ENABLE  = 0x01,
213 	DEEP_SLEEP_DISABLE = 0x00
214 } dpslp_state_e;
215 
216 /**
217  * @enum crypto_endian_enum_t
218  * @brief States the available endian formats.
219  *
220  */
221 typedef enum {
222 	CRYPTO_LITTLE_ENDIAN,
223 	CRYPTO_BIG_ENDIAN
224 } crypto_endian_enum_t;
225 
226 /**
227  * @enum security_mode_enum_t
228  * @brief Contains the available security modes.
229  *
230  * Note: The enum values should be the same as specified in the register
231  *  address header file.
232  */
233 typedef enum {
234 	ECB_DECRYPT	= 0,
235 	CCM_DECRYPT	= 1,
236 	ECB_ENCRYPT	= 2,
237 	CCM_ENCRYPT	= 3,
238 	CTR_ENCRYPT = 4,
239 	CTR_DECRYPT = 5,
240 	MODES_MAX_NUM
241 } security_mode_enum_t;
242 
243 #if SUPPORT_MAC
244 typedef enum ral_phy_rate_enum {
245 #if SUPPORT_A_MAC
246 	RAL_RATE_125K = 0x00,
247 	RAL_RATE_1M   = 0x02,
248 	RAL_RATE_2M   = 0x03,
249 #endif
250 	RAL_RATE_256K  = 0x01
251 } ral_phy_rate_enum_t;
252 #endif /*SUPPORT_MAC*/
253 /**
254  * @enum extrnl_evnt_priority_e
255  * @brief External Event priority
256  */
257 typedef enum _extrnl_evnt_priority_e
258 {
259 	PRIORITY_DEFAULT,
260 	PRIORITY_HIGH,
261 	PRIORITY_CRITICAL
262 }extrnl_evnt_priority_e;
263 
264 /**
265  * @enum extrnl_evnt_state_e
266  * @brief External Event Blocked State and reason
267  */
268 typedef enum _extrnl_evnt_state_e
269 {
270 	STATE_BLOCKED_UNKNOWN,
271 	STATE_BLOCKED_PRIORITY,
272 	STATE_BLOCKED_CANCELLED,
273 	STATE_BLOCKED_LATE,
274 	STATE_BLOCKED_DEADLINE,
275 	STATE_NOT_BLOCKED
276 }extrnl_evnt_state_e;
277 
278 /**
279   * @brief Enumeration of the source type used to drive the sleep timer.
280   */
281 typedef enum _slptmr_src_type_e {
282 	CRYSTAL_OSCILLATOR_SLPTMR	= 0x00,
283 #if (USE_NON_ACCURATE_32K_SLEEP_CLK)
284 	RCO_SLPTMR					= 0x01,
285 	RTC_SLPTMR					= 0x02
286 #endif /* USE_NON_ACCURATE_32K_SLEEP_CLK */
287 }slptmr_src_type_e;
288 
289 
290 
291 /*
292  * @brief structure that hold some information about the data transmitted across layers.
293  */
294 typedef struct ble_buff_hdr_st {
295 	/* pointer to buffer allocated in TX/RX buffer*/
296 	uint8_t *buff_start;
297 	/* pointer to next ble_buff_hdr node */
298 	struct ble_buff_hdr_st *next_pkt;
299 	/* Total buffer size */
300 	uint16_t total_len;
301 	/* offset to data location from the packet start pointed to by buff_start */
302 	uint16_t data_offset;
303 	/* data size for the data pointed to by buff_start + data_offset*/
304 	uint16_t data_size;
305 	/* bit field flags to be used for identifying buffer type data/control buffer,
306 	 * for data is it a BLE/MAC/ANT, does it contain complete SDU packet of it is a fragment,
307 	 * if it is a fragment is it the start or continuation or last fragment. */
308 	uint8_t ble_hdr_flags;
309 } pkt_buff_hdr_t ,ble_buff_hdr_t, *ble_buff_hdr_p;
310 
311 #if (SUPPORT_BRD_ISOCHRONOUS || SUPPORT_SYNC_ISOCHRONOUS ||  (SUPPORT_CONNECTED_ISOCHRONOUS && ( SUPPORT_MASTER_CONNECTION || SUPPORT_SLAVE_CONNECTION)))
312 /**
313  * @brief:  PDU info structure
314  */
315 typedef struct _iso_pdu_buff_hdr_st {
316 	ble_buff_hdr_t  pkt;	/* PDU Packet */
317 #if(SUPPORT_CONNECTED_ISOCHRONOUS && (SUPPORT_MASTER_CONNECTION || SUPPORT_SLAVE_CONNECTION))
318 	uint8_t flsh_tmout_cnt;		/* flush timeout counter */
319 	uint8_t flsh_tmout_subevnt_cnt;		/* flush timeout subevent number */
320 #endif //(SUPPORT_CONNECTED_ISOCHRONOUS && (SUPPORT_MASTER_CONNECTION || SUPPORT_SLAVE_CONNECTION))
321 	uint8_t status;
322 } iso_pdu_buff_hdr_st;
323 /**
324  * @brief:  SDU info structure
325  */
326 typedef struct _sdu_buf_hdr_st {
327 	iso_pdu_buff_hdr_st* ptr_last_pdu_buff_hdr;		/* pointer to the last pdu buffer header pointed to this sdu */
328 	struct _sdu_buf_hdr_st* ptr_nxt_sdu_buff_hdr;	/* next sdu pointer */
329 	uint32_t*ptr_sdu_buffer;	/* pointer to SDU buffer in system memory for rx*/
330 	uint32_t time_stamp;	/* Time Stamp associated with this SDU */
331 	uint32_t time_offset;	/* Time Offset used only in framed SDUs */
332 	uint16_t pkt_sqnc_num;	/* Packet Sequence Number */
333 	uint16_t iso_sdu_len;	/* ISO SDU data real length */
334 	uint8_t  pkt_status_flag;
335 	uint8_t  pb_flag;      /* PB_flag used in rx */
336 	/*
337 	 * the first one will have the value 10 complete sdu until a new sdu fragment will be received then it will be 00 first fragment
338 	 * the subsequent one will have the value 11 last fragment until a new sdu fragment will be received then it will be 01 continuation fragment
339 	 *
340 	 * */
341 } iso_sdu_buf_hdr_st, *iso_sdu_buf_hdr_p;
342 #endif  /* (SUPPORT_BRD_ISOCHRONOUS || SUPPORT_SYNC_ISOCHRONOUSs ||  (SUPPORT_CONNECTED_ISOCHRONOUS && ( SUPPORT_MASTER_CONNECTION || SUPPORT_SLAVE_CONNECTION))) */
343 
344 /**
345  * brief: PAWR host buffer struct
346  */
347 typedef struct _pawr_host_buffer {
348 	uint8_t buffer[257];
349 	uint8_t total_data_lenth;
350 	uint8_t number_of_reports;
351 }pawr_host_buffer;
352 
353 /*
354  * @brief   Transport layer event
355  */
356 typedef enum {
357 	HCI_CMD_PCKT = 0x01,
358 	HCI_ACL_DATA_PCKT = 0x02,
359 	HCI_EVNT_PCKT = 0x04,
360 	HCI_ISO_DATA_PCKT = 0x05,
361 #if (SUPPORT_MAC && SUPPORT_MAC_HCI_UART)
362 	HCI_MAC_REQ = 0x0A,
363 	HCI_MAC_CFM = 0x0B,
364 	HCI_MAC_KEY_TBL_CFM = 0x0E,
365 #endif /* SUPPORT_MAC && SUPPORT_MAC_HCI_UART */
366 #if (SUPPORT_ANT_HCI_UART)
367 	HCI_ANT_REQ = 0x07,
368 	HCI_ANT_CFM = 0x08,
369 #endif /* SUPPORT_ANT_HCI_UART */
370 #if (SUPPORT_AUG_MAC_HCI_UART)
371 	AUG_HCI_MAC_REQ = 0x0C,
372 	AUG_HCI_MAC_CFM = 0x0D,
373 #endif /* SUPPORT_AUG_MAC_HCI_UART */
374 
375 } event_t;
376 
377 
378 
379 /*constant flags to be used with ble_buff_hdr_t:ble_hdr_flags*/
380 #define BLE_BUFF_HDR_STRT_PKT 			(1<<0)
381 #define BLE_BUFF_HDR_CNTRL_PKT 			(1<<1)
382 #define BLE_BUFF_HDR_BUFF_FRGMNTD 		(1<<2)
383 #define BLE_BUFF_HDR_EVNT_CMD_PCKT		(1<<3)
384 #define BLE_BUFF_HDR_ACL_DATA_PCKT		(1<<4)
385 
386 #if ((SUPPORT_CONNECTED_ISOCHRONOUS && (SUPPORT_MASTER_CONNECTION || SUPPORT_SLAVE_CONNECTION)) \
387 		||(SUPPORT_BRD_ISOCHRONOUS || SUPPORT_SYNC_ISOCHRONOUS))
388 #define BLE_BUFF_HDR_NULL_PCKT		(1<<3)
389 /*
390  * BLE_BUFF_HDR_ISO_DATA_PCKT_BIT1  : BLE_BUFF_HDR_ISO_DATA_PCKT_BIT0   = Mode
391  * 1								: 1									= Unframed CIS Data PDU; end fragment of an SDU or a complete SDU. LLID (0b00)
392  * 0								: 1									= Unframed CIS Data PDU; start or continuation fragment of an SDU.
393  * 1								: 0									= Framed CIS Data PDU; one or more segments of an SDU.
394  * */
395 #define BLE_BUFF_HDR_ISO_DATA_PCKT_BIT0		(1<<5)
396 #define BLE_BUFF_HDR_ISO_DATA_PCKT_BIT1		(1<<6)
397 #endif /* (SUPPORT_CONNECTED_ISOCHRONOUS && (SUPPORT_MASTER_CONNECTION || SUPPORT_SLAVE_CONNECTION)) */
398 #if (SUPPORT_MAC && SUPPORT_MAC_HCI_UART)
399 #define BLE_BUFF_HDR_MAC_CMD_PCK		(1<<6)
400 #define BLE_BUFF_HDR_MAC_KEY_TBL_CMD_PCK		((1<<7)|(1<<4))
401 #endif /* (SUPPORT_MAC && SUPPORT_MAC_HCI_UART) */
402 #if (SUPPORT_ANT_HCI_UART)
403 #define BLE_BUFF_HDR_ANT_CMD_PCK		(1<<7)
404 #endif  /* SUPPORT_ANT_HCI_UART */
405 #if (SUPPORT_AUG_MAC_HCI_UART)
406 #define BLE_BUFF_HDR_AUG_MAC_CMD_PCK		((1<<7)|(1<<6))
407 #endif
408 
409 
410 /**
411  * The default PHY periodic calibration period in second. this Macro can be set to any value , Zero means that phy periodic calibration is disabled
412  */
413 #define DEFAULT_PHY_CALIBRATION_PERIOD        		10	/* Time period for PHY calibration = 10s */
414 
415 
416 #ifndef EXTERNAL_CUSTOM_CMDS
417 #define EXTERNAL_CUSTOM_CMDS						0	/* Indicates that an external custom HCI commands module exists */
418 #endif /* EXTERNAL_CUSTOM_CMDS */
419 #define SUPPORT_ZIGBEE_PHY_CERTIFICATION   0  /* 0 disable , 1 enable .. used to enable support of hci command required to implement zigbee phy Test cases*/
420 
421 
422 #if (!USE_HCI_TRANSPORT) && (SUPPORT_BLE)						  /* SUPPORT_HCI_EVENT_ONLY cannot be supported with default HCI_transport */
423 /* if this marco is enabled it will enable  the below features
424  *  -Queue events - ACL - ISO - Reports into different queues
425    -Allow host to register callback to refuse current controller event and receive it later with another callback*/
426 #define SUPPORT_HCI_EVENT_ONLY				1
427 
428 #endif/* (!USE_HCI_TRANSPORT) && (SUPPORT_BLE) */
429 
430 #define SUPPORT_HW_AUDIO_SYNC_SIGNAL       0
431 
432 
433 #endif /*COMMON_TYPES_H_*/
434