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Searched refs:RI_CMR1_PA_Pos (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-3.7.0/stm32cube/stm32l1xx/soc/
Dstm32l100xc.h6000 #define RI_CMR1_PA_Pos (0U) macro
6001 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6003 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6004 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6005 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6006 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6007 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6008 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6009 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6010 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l151xc.h6189 #define RI_CMR1_PA_Pos (0U) macro
6190 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6192 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6193 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6194 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6195 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6196 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6197 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6198 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6199 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l151xca.h6253 #define RI_CMR1_PA_Pos (0U) macro
6254 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6256 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6257 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6258 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6259 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6260 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6261 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6262 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6263 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l151xdx.h6318 #define RI_CMR1_PA_Pos (0U) macro
6319 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6321 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6322 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6323 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6324 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6325 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6326 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6327 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6328 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l151xe.h6318 #define RI_CMR1_PA_Pos (0U) macro
6319 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6321 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6322 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6323 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6324 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6325 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6326 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6327 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6328 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l152xc.h6318 #define RI_CMR1_PA_Pos (0U) macro
6319 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6321 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6322 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6323 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6324 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6325 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6326 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6327 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6328 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l152xca.h6403 #define RI_CMR1_PA_Pos (0U) macro
6404 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6406 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6407 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6408 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6409 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6410 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6411 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6412 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6413 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l152xdx.h6468 #define RI_CMR1_PA_Pos (0U) macro
6469 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6471 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6472 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6473 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6474 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6475 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6476 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6477 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6478 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l152xe.h6468 #define RI_CMR1_PA_Pos (0U) macro
6469 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6471 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6472 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6473 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6474 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6475 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6476 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6477 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6478 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l162xca.h6542 #define RI_CMR1_PA_Pos (0U) macro
6543 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6545 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6546 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6547 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6548 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6549 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6550 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6551 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6552 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l162xc.h6457 #define RI_CMR1_PA_Pos (0U) macro
6458 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6460 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6461 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6462 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6463 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6464 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6465 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6466 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6467 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l162xdx.h6607 #define RI_CMR1_PA_Pos (0U) macro
6608 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6610 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6611 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6612 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6613 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6614 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6615 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6616 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6617 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l162xe.h6607 #define RI_CMR1_PA_Pos (0U) macro
6608 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6610 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6611 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6612 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6613 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6614 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6615 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6616 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6617 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l151xd.h6953 #define RI_CMR1_PA_Pos (0U) macro
6954 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
6956 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
6957 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
6958 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
6959 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
6960 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
6961 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
6962 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
6963 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l152xd.h7103 #define RI_CMR1_PA_Pos (0U) macro
7104 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
7106 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
7107 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
7108 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
7109 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
7110 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
7111 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
7112 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
7113 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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Dstm32l162xd.h7242 #define RI_CMR1_PA_Pos (0U) macro
7243 #define RI_CMR1_PA_Msk (0xFFFFUL << RI_CMR1_PA_Pos) /*!< 0x0000FFFF */
7245 #define RI_CMR1_PA_0 (0x0001UL << RI_CMR1_PA_Pos) /*!< 0x00000001 */
7246 #define RI_CMR1_PA_1 (0x0002UL << RI_CMR1_PA_Pos) /*!< 0x00000002 */
7247 #define RI_CMR1_PA_2 (0x0004UL << RI_CMR1_PA_Pos) /*!< 0x00000004 */
7248 #define RI_CMR1_PA_3 (0x0008UL << RI_CMR1_PA_Pos) /*!< 0x00000008 */
7249 #define RI_CMR1_PA_4 (0x0010UL << RI_CMR1_PA_Pos) /*!< 0x00000010 */
7250 #define RI_CMR1_PA_5 (0x0020UL << RI_CMR1_PA_Pos) /*!< 0x00000020 */
7251 #define RI_CMR1_PA_6 (0x0040UL << RI_CMR1_PA_Pos) /*!< 0x00000040 */
7252 #define RI_CMR1_PA_7 (0x0080UL << RI_CMR1_PA_Pos) /*!< 0x00000080 */
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