| /hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/src/ |
| D | stm32wbaxx_hal_rcc.c | 887 …(((tmpreg2 & RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) != (RCC_OscInitStruct->PLL1.PLLQ - 1u)… in HAL_RCC_OscConfig()
1410 pllq = ((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1U; in HAL_RCC_GetPLL1QFreq()
1505 RCC_OscInitStruct->PLL1.PLLQ = (((regvalue & RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1U); in HAL_RCC_GetOscConfig()
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| /hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/ |
| D | stm32wbaxx_ll_rcc.h | 2355 …MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1Q, ((PLLN - 1UL) << RCC_PLL1DIVR_P… in LL_RCC_PLL1_ConfigDomain_PLL1Q()
2437 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q, (PLL1Q - 1UL) << RCC_PLL1DIVR_PLL1Q_Pos); in LL_RCC_PLL1_SetQ()
2448 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1UL); in LL_RCC_PLL1_GetQ()
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| /hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/src/ |
| D | stm32h5xx_hal_rcc.c | 959 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1Q) >> \ in HAL_RCC_OscConfig()
1607 …pOscInitStruct->PLL.PLLQ = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) +… in HAL_RCC_GetOscConfig()
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| D | stm32h5xx_hal_rcc_ex.c | 2851 … RCC_PLL1DIVR_PLL1Q) >> \ in HAL_RCCEx_GetPLL1ClockFreq()
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| /hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/src/ |
| D | stm32u5xx_hal_rcc.c | 1280 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1Q) >> \ in HAL_RCC_OscConfig()
1939 …pRCC_OscInitStruct->PLL.PLLQ = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Po… in HAL_RCC_GetOscConfig()
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| D | stm32u5xx_hal_rcc_ex.c | 1549 … RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + \ in HAL_RCCEx_GetPLL1ClockFreq()
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| /hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_ll_rcc.h | 3950 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1Q, ((PLLN - 1UL) << \ in LL_RCC_PLL1_ConfigDomain_48M()
4041 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q, (PLL1Q - 1UL) << RCC_PLL1DIVR_PLL1Q_Pos); in LL_RCC_PLL1_SetQ()
4053 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1UL); in LL_RCC_PLL1_GetQ()
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| D | stm32u5xx_hal_rcc.h | 4456 MODIFY_REG(RCC->PLL1DIVR ,(RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1P | RCC_PLL1DIVR_PLL1Q |\
4461 RCC_PLL1DIVR_PLL1Q) |\
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| /hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_ll_rcc.h | 4402 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q, (PLL1Q - 1UL) << RCC_PLL1DIVR_PLL1Q_Pos); in LL_RCC_PLL1_SetQ()
4413 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1UL); in LL_RCC_PLL1_GetQ()
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| D | stm32h5xx_hal_rcc.h | 4572 … ((((__PLL1Q__) - 1U) << RCC_PLL1DIVR_PLL1Q_Pos) & RCC_PLL1DIVR_PLL1Q) | \
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| /hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/ |
| D | stm32wba50xx.h | 6054 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk macro
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| D | stm32wba52xx.h | 9827 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk macro
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| D | stm32wba54xx.h | 10099 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk macro
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| D | stm32wba55xx.h | 10117 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk macro
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| /hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/ |
| D | stm32h503xx.h | 8583 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk macro
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| D | stm32h523xx.h | 12761 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk macro
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| D | stm32h562xx.h | 13421 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk macro
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| D | stm32h533xx.h | 13279 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk macro
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| D | stm32h563xx.h | 15505 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk macro
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| D | stm32h573xx.h | 16023 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk macro
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| /hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/ |
| D | stm32u535xx.h | 14081 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk /*!< PLL1Q[6:0]… macro
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| D | stm32u545xx.h | 14594 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk /*!< PLL1Q[6:0]… macro
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| D | stm32u575xx.h | 15488 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk /*!< PLL1Q[6:0]… macro
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| D | stm32u585xx.h | 16050 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk /*!< PLL1Q[6:0]… macro
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| D | stm32u5f7xx.h | 18049 #define RCC_PLL1DIVR_PLL1Q RCC_PLL1DIVR_PLL1Q_Msk /*!< PLL1Q[6:0]… macro
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