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Searched refs:RCC_CFGR_PPRE_DIV1 (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-3.7.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_rcc.h257 #define LL_RCC_APB1_DIV_1 RCC_CFGR_PPRE_DIV1 /*!< HCLK not divided */
Dstm32f0xx_hal_rcc.h432 #define RCC_HCLK_DIV1 RCC_CFGR_PPRE_DIV1 /*!< HCLK not divided */
/hal_stm32-3.7.0/stm32cube/stm32f0xx/soc/
Dstm32f030x8.h2863 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f030x6.h2833 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f070x6.h2887 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f038xx.h2934 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f070xb.h2979 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f030xc.h3127 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f031x6.h2959 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f058xx.h3383 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f051x8.h3408 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f071xb.h3802 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f048xx.h7101 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f042x6.h7125 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f072xb.h7572 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f078xx.h7548 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f091xc.h8035 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro
Dstm32f098xx.h8011 #define RCC_CFGR_PPRE_DIV1 (0x00000000U) /*!< HCLK not divide… macro