Searched refs:RCC_CFGR1_SWS (Results 1 – 25 of 37) sorted by relevance
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251 while (READ_BIT(RCC->CFGR1, RCC_CFGR1_SWS) != 0U) in HAL_RCC_DeInit()1365 tmp = (RCC->CFGR1 & RCC_CFGR1_SWS); in HAL_RCC_GetHCLK5Freq()
292 switch (RCC->CFGR1 & RCC_CFGR1_SWS) in SystemCoreClockUpdate()
315 switch (RCC->CFGR1 & RCC_CFGR1_SWS) in SystemCoreClockUpdate()
13876 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b… macro
14389 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b… macro
304 switch (RCC->CFGR1 & RCC_CFGR1_SWS) in SystemCoreClockUpdate()
326 switch (RCC->CFGR1 & RCC_CFGR1_SWS) in SystemCoreClockUpdate()
5945 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b… macro
9718 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b… macro
9990 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b… macro
10008 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b… macro
327 switch (RCC->CFGR1 & RCC_CFGR1_SWS) in SystemCoreClockUpdate()
341 switch (RCC->CFGR1 & RCC_CFGR1_SWS) in SystemCoreClockUpdate()
8377 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b… macro
12516 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b… macro
13176 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b… macro
13034 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b… macro
314 while (READ_BIT(RCC->CFGR1, RCC_CFGR1_SWS) != 0U) in HAL_RCC_DeInit()
397 while (READ_BIT(RCC->CFGR1, RCC_CFGR1_SWS) != 0U) in HAL_RCC_DeInit()
1456 return (uint32_t)(READ_BIT(RCC->CFGR1, RCC_CFGR1_SWS)); in LL_RCC_GetSysClkSource()
2055 #define __HAL_RCC_GET_SYSCLK_SOURCE() (RCC->CFGR1 & RCC_CFGR1_SWS)
2176 return (uint32_t)(READ_BIT(RCC->CFGR1, RCC_CFGR1_SWS)); in LL_RCC_GetSysClkSource()
4676 #define __HAL_RCC_GET_SYSCLK_SOURCE() ((uint32_t)(RCC->CFGR1 & RCC_CFGR1_SWS))
2566 return (uint32_t)(READ_BIT(RCC->CFGR1, RCC_CFGR1_SWS)); in LL_RCC_GetSysClkSource()
4532 #define __HAL_RCC_GET_SYSCLK_SOURCE() ((uint32_t)(RCC->CFGR1 & RCC_CFGR1_SWS))