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Searched refs:RCC_CCIPR3_SPI3SEL_0 (Results 1 – 25 of 28) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc_ex.h747 #define RCC_SPI3CLKSOURCE_SYSCLK RCC_CCIPR3_SPI3SEL_0
749 #define RCC_SPI3CLKSOURCE_MSIK (RCC_CCIPR3_SPI3SEL_0 | RCC_CCIPR3_SPI3SEL_1)
Dstm32u5xx_ll_rcc.h587 … (RCC_CCIPR3_SPI3SEL_0 >> RCC_CCIPR3_SPI3SEL_Pos)) /*!< SYSCLK clock used as SPI3 clock source */
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc_ex.h330 #define RCC_SPI3CLKSOURCE_SYSCLK RCC_CCIPR3_SPI3SEL_0
Dstm32wbaxx_ll_rcc.h450 … ((RCC_OFFSET_CCIPR3 << 24U) | (RCC_CCIPR3_SPI3SEL_Pos << 16U) | (RCC_CCIPR3_SPI3SEL_0 >> RCC_CCIP…
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc_ex.h949 #define RCC_SPI3CLKSOURCE_PLL2P RCC_CCIPR3_SPI3SEL_0
953 #define RCC_SPI3CLKSOURCE_PIN (RCC_CCIPR3_SPI3SEL_0 | RCC_CCIPR3_SPI3SEL_1)
Dstm32h5xx_ll_rcc.h761 …SOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SPI3SEL, RCC_CCIPR3_SPI3SEL_Pos, RCC_CCIPR3_SPI3SEL_0) …
765 …CC_CCIPR3_SPI3SEL, RCC_CCIPR3_SPI3SEL_Pos, RCC_CCIPR3_SPI3SEL_1 | RCC_CCIPR3_SPI3SEL_0) /*!< PIN …
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h6457 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x00000008… macro
Dstm32wba52xx.h10325 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x00000008… macro
Dstm32wba54xx.h10644 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x00000008… macro
Dstm32wba55xx.h10662 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x00000008… macro
/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h9257 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x00000040… macro
Dstm32h523xx.h13706 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x00000040… macro
Dstm32h562xx.h14646 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x00000040… macro
Dstm32h533xx.h14251 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x00000040… macro
Dstm32h563xx.h16739 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x00000040… macro
Dstm32h573xx.h17284 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x00000040… macro
/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h15170 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x0000000… macro
Dstm32u545xx.h15722 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x0000000… macro
Dstm32u575xx.h16684 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x0000000… macro
Dstm32u585xx.h17294 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x0000000… macro
Dstm32u5f7xx.h19387 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x0000000… macro
Dstm32u595xx.h17794 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x0000000… macro
Dstm32u5a5xx.h18404 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x0000000… macro
Dstm32u599xx.h21568 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x0000000… macro
Dstm32u5g7xx.h19997 #define RCC_CCIPR3_SPI3SEL_0 (0x1UL << RCC_CCIPR3_SPI3SEL_Pos) /*!< 0x0000000… macro

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