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Searched refs:RCC_AHB4ENR_GPIOFEN (Results 1 – 25 of 30) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h1465 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOFEN);\
1467 tmpreg = READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOFEN);\
1587 #define __HAL_RCC_GPIOF_CLK_DISABLE() (RCC->AHB4ENR) &= ~ (RCC_AHB4ENR_GPIOFEN)
1627 #define __HAL_RCC_GPIOF_IS_CLK_ENABLED() ((RCC->AHB4ENR & RCC_AHB4ENR_GPIOFEN) != 0U)
1660 #define __HAL_RCC_GPIOF_IS_CLK_DISABLED() ((RCC->AHB4ENR & RCC_AHB4ENR_GPIOFEN) == 0U)
2951 SET_BIT(RCC_C1->AHB4ENR, RCC_AHB4ENR_GPIOFEN);\
2953 tmpreg = READ_BIT(RCC_C1->AHB4ENR, RCC_AHB4ENR_GPIOFEN);\
3043 #define __HAL_RCC_C1_GPIOF_CLK_DISABLE() (RCC_C1->AHB4ENR) &= ~ (RCC_AHB4ENR_GPIOFEN)
3981 SET_BIT(RCC_C2->AHB4ENR, RCC_AHB4ENR_GPIOFEN);\
3983 tmpreg = READ_BIT(RCC_C2->AHB4ENR, RCC_AHB4ENR_GPIOFEN);\
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Dstm32h7xx_ll_bus.h199 #define LL_AHB4_GRP1_PERIPH_GPIOF RCC_AHB4ENR_GPIOFEN
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_bus.h121 #define LL_AHB4_GRP1_PERIPH_GPIOF RCC_AHB4ENR_GPIOFEN
Dstm32h7rsxx_hal_rcc.h1106 SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOFEN);\
1187 #define __HAL_RCC_GPIOF_CLK_DISABLE() CLEAR_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOFEN)
2009 #define __HAL_RCC_GPIOF_IS_CLK_ENABLED() (READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOFEN) != 0U)
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h15983 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h7s3xx.h16627 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h7s7xx.h17047 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h7r7xx.h16401 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
/hal_stm32-3.7.0/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h13500 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h7a3xxq.h13512 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h7b0xx.h13956 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h7b0xxq.h13968 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h7b3xx.h13963 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h7b3xxq.h13975 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h723xx.h15349 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h725xx.h15361 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h730xxq.h15824 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h730xx.h15812 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h742xx.h14693 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h733xx.h15812 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h735xx.h15824 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h750xx.h15595 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h753xx.h15601 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h755xx.h16200 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro
Dstm32h745xx.h15925 #define RCC_AHB4ENR_GPIOFEN RCC_AHB4ENR_GPIOFEN_Msk macro

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