LL_RCC_SYSCLK_DIV_1 (reference) in projects: hal_stm32-3.7.0

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Searched refs:LL_RCC_SYSCLK_DIV_1 (Results 1 – 25 of 41) sorted by relevance

/hal_stm32-3.7.0/stm32cube/stm32l5xx/drivers/src/
D	stm32l5xx_ll_utils.c	64 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ 374 uint32_t hpre = LL_RCC_SYSCLK_DIV_1; /* Set default value / in LL_PLL_ConfigSystemClock_MSI() 447 if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_MSI() 457 if ((status == SUCCESS) && (hpre != LL_RCC_SYSCLK_DIV_1)) in LL_PLL_ConfigSystemClock_MSI() 463 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_MSI() 500 uint32_t hpre = LL_RCC_SYSCLK_DIV_1; / Set default value / in LL_PLL_ConfigSystemClock_HSI() 525 if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_HSI() 535 if ((status == SUCCESS) && (hpre != LL_RCC_SYSCLK_DIV_1)) in LL_PLL_ConfigSystemClock_HSI() 541 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_HSI() 581 uint32_t hpre = LL_RCC_SYSCLK_DIV_1; / Set default value */ in LL_PLL_ConfigSystemClock_HSE() [all …]
/hal_stm32-3.7.0/stm32cube/stm32l4xx/drivers/src/
D	stm32l4xx_ll_utils.c	89 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ 527 if(UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_MSI() 540 if((status == SUCCESS) && (hpre != LL_RCC_SYSCLK_DIV_1)) in LL_PLL_ConfigSystemClock_MSI() 546 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_MSI() 586 uint32_t hpre = LL_RCC_SYSCLK_DIV_1; /* Set default value */ in LL_PLL_ConfigSystemClock_HSI() 614 if(UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_HSI() 627 if((status == SUCCESS) && (hpre != LL_RCC_SYSCLK_DIV_1)) in LL_PLL_ConfigSystemClock_HSI() 633 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_HSI() 719 if(UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_HSE() 732 if((status == SUCCESS) && (hpre != LL_RCC_SYSCLK_DIV_1)) in LL_PLL_ConfigSystemClock_HSE() [all …]
/hal_stm32-3.7.0/stm32cube/stm32g4xx/drivers/src/
D	stm32g4xx_ll_utils.c	81 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ 411 uint32_t hpre = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_HSI() 436 if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_HSI() 447 if ((status == SUCCESS) && (hpre != LL_RCC_SYSCLK_DIV_1)) in LL_PLL_ConfigSystemClock_HSI() 453 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_HSI() 493 uint32_t hpre = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_HSE() 533 if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_HSE() 544 if ((status == SUCCESS) && (hpre != LL_RCC_SYSCLK_DIV_1)) in LL_PLL_ConfigSystemClock_HSE() 550 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_HSE()
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/src/
D	stm32u5xx_ll_utils.c	`84 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ 489 uint32_t hpre = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_MSI() 567 if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_MSI() 577 if ((status == SUCCESS) && (hpre != LL_RCC_SYSCLK_DIV_1)) in LL_PLL_ConfigSystemClock_MSI() 583 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_MSI()`
/hal_stm32-3.7.0/stm32cube/stm32l1xx/drivers/src/
D	stm32l1xx_ll_utils.c	`67 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32f3xx/drivers/src/
D	stm32f3xx_ll_utils.c	`61 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32l0xx/drivers/src/
D	stm32l0xx_ll_utils.c	`67 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/src/
D	stm32wbaxx_ll_utils.c	`69 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32g0xx/drivers/src/
D	stm32g0xx_ll_utils.c	`67 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32f0xx/drivers/src/
D	stm32f0xx_ll_utils.c	`61 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32f2xx/drivers/src/
D	stm32f2xx_ll_utils.c	`67 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32f7xx/drivers/src/
D	stm32f7xx_ll_utils.c	`82 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32wlxx/drivers/src/
D	stm32wlxx_ll_utils.c	`64 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32wbxx/drivers/src/
D	stm32wbxx_ll_utils.c	`65 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32f1xx/drivers/src/
D	stm32f1xx_ll_utils.c	`66 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32f4xx/drivers/src/
D	stm32f4xx_ll_utils.c	`111 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/src/
D	stm32h7rsxx_ll_utils.c	`88 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/src/
D	stm32h5xx_ll_utils.c	`100 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32h7xx/drivers/src/
D	stm32h7xx_ll_utils.c	`158 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \`
/hal_stm32-3.7.0/stm32cube/stm32c0xx/drivers/include/
D	stm32c0xx_ll_rcc.h	`216 #define LL_RCC_SYSCLK_DIV_1 0x00000000U … macro`
/hal_stm32-3.7.0/stm32cube/stm32l1xx/drivers/include/
D	stm32l1xx_ll_rcc.h	`213 #define LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 /!< SYSCLK not divided / macro`
/hal_stm32-3.7.0/stm32cube/stm32f0xx/drivers/include/
D	stm32f0xx_ll_rcc.h	`241 #define LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 /!< SYSCLK not divided / macro`
/hal_stm32-3.7.0/stm32cube/stm32f1xx/drivers/include/
D	stm32f1xx_ll_rcc.h	`213 #define LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 /!< SYSCLK not divided / macro`
/hal_stm32-3.7.0/stm32cube/stm32f2xx/drivers/include/
D	stm32f2xx_ll_rcc.h	`197 #define LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 /!< SYSCLK not divided / macro`
/hal_stm32-3.7.0/stm32cube/stm32l0xx/drivers/include/
D	stm32l0xx_ll_rcc.h	`258 #define LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 /!< SYSCLK not divided / macro`

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