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Searched refs:LL_APB1_GRP1_PERIPH_WWDG (Results 1 – 21 of 21) sorted by relevance

/hal_stm32-3.7.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_rcc.h942 …fine __HAL_RCC_WWDG_CLK_ENABLE() LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_WWDG)
944 …ine __HAL_RCC_WWDG_CLK_DISABLE() LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_WWDG)
1123 …e __HAL_RCC_WWDG_IS_CLK_ENABLED() LL_APB1_GRP1_IsEnabledClock(LL_APB1_GRP1_PERIPH_WWDG)
1508 …__HAL_RCC_WWDG_CLK_SLEEP_ENABLE() LL_APB1_GRP1_EnableClockSleep(LL_APB1_GRP1_PERIPH_WWDG)
1510 …_HAL_RCC_WWDG_CLK_SLEEP_DISABLE() LL_APB1_GRP1_DisableClockSleep(LL_APB1_GRP1_PERIPH_WWDG)
1692 …AL_RCC_WWDG_IS_CLK_SLEEP_ENABLED() LL_APB1_GRP1_IsEnabledClockSleep(LL_APB1_GRP1_PERIPH_WWDG)
Dstm32wlxx_ll_bus.h119 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_rcc.h982 #define __HAL_RCC_WWDG_CLK_ENABLE() LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_WWDG)
1186 …ine __HAL_RCC_WWDG_IS_CLK_ENABLED() LL_APB1_GRP1_IsEnabledClock(LL_APB1_GRP1_PERIPH_WWDG)
1212 … __HAL_RCC_WWDG_IS_CLK_DISABLED() !(LL_APB1_GRP1_IsEnabledClock(LL_APB1_GRP1_PERIPH_WWDG))
2126 …__HAL_RCC_WWDG_CLK_SLEEP_ENABLE() LL_APB1_GRP1_EnableClockSleep(LL_APB1_GRP1_PERIPH_WWDG)
2151 …_HAL_RCC_WWDG_CLK_SLEEP_DISABLE() LL_APB1_GRP1_DisableClockSleep(LL_APB1_GRP1_PERIPH_WWDG)
Dstm32wbxx_ll_bus.h140 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_bus.h112 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_bus.h141 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_bus.h165 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_bus.h119 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_bus.h90 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APBENR1_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_bus.h108 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN /*!< WWDG clock enable */ macro
/hal_stm32-3.7.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_bus.h122 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APBENR1_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_bus.h139 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_bus.h158 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_bus.h216 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_bus.h146 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_bus.h133 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_bus.h188 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_bus.h137 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_bus.h226 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1LENR_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_bus.h172 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN macro
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_bus.h221 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN macro