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Searched refs:IWDG_SR_ONF (Results 1 – 23 of 23) sorted by relevance

/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_iwdg.h406 return ((READ_BIT(IWDGx->SR, IWDG_SR_ONF) == (IWDG_SR_ONF)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_ONF()
Dstm32h5xx_hal_iwdg.h143 #define IWDG_STATUS_ENABLE IWDG_SR_ONF
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_iwdg.h406 return ((READ_BIT(IWDGx->SR, IWDG_SR_ONF) == (IWDG_SR_ONF)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_ONF()
Dstm32h7rsxx_hal_iwdg.h143 #define IWDG_STATUS_ENABLE IWDG_SR_ONF
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_iwdg.h406 return ((READ_BIT(IWDGx->SR, IWDG_SR_ONF) == (IWDG_SR_ONF)) ? 1UL : 0UL); in LL_IWDG_IsActiveFlag_ONF()
Dstm32wbaxx_hal_iwdg.h143 #define IWDG_STATUS_ENABLE IWDG_SR_ONF
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_iwdg.c438 status = (hiwdg->Instance->SR & IWDG_SR_ONF); in HAL_IWDG_GetActiveStatus()
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_iwdg.c438 status = (hiwdg->Instance->SR & IWDG_SR_ONF); in HAL_IWDG_GetActiveStatus()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_iwdg.c438 status = (hiwdg->Instance->SR & IWDG_SR_ONF); in HAL_IWDG_GetActiveStatus()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h4619 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog e… macro
Dstm32wba52xx.h8219 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog e… macro
Dstm32wba54xx.h8453 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog e… macro
Dstm32wba55xx.h8453 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog e… macro
/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h12444 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog E… macro
Dstm32h523xx.h18440 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog E… macro
Dstm32h562xx.h19964 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog E… macro
Dstm32h533xx.h19017 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog E… macro
Dstm32h563xx.h22096 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog E… macro
Dstm32h573xx.h22673 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog E… macro
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h12207 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog enable… macro
Dstm32h7s3xx.h12652 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog enable… macro
Dstm32h7s7xx.h12796 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog enable… macro
Dstm32h7r7xx.h12349 #define IWDG_SR_ONF IWDG_SR_ONF_Msk /*!< Watchdog enable… macro