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Searched refs:IER4 (Results 1 – 23 of 23) sorted by relevance

/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_gtzc.c1190 WRITE_REG(GTZC_TZIC->IER4, 0U); in HAL_GTZC_TZIC_DisableIT()
1228 WRITE_REG(GTZC_TZIC->IER4, TZIC1_IER4_ALL); in HAL_GTZC_TZIC_EnableIT()
1450 ier_itsources = READ_REG(GTZC_TZIC_S->IER4); in HAL_GTZC_IRQHandler()
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_gtzc.c1542 WRITE_REG(GTZC_TZIC1->IER4, 0U); in HAL_GTZC_TZIC_DisableIT()
1580 WRITE_REG(GTZC_TZIC1->IER4, GTZC_CFGR4_MSK); in HAL_GTZC_TZIC_EnableIT()
1798 ier_itsources = READ_REG(GTZC_TZIC1_S->IER4); in HAL_GTZC_IRQHandler()
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_gtzc.c1822 WRITE_REG(GTZC_TZIC1->IER4, 0U); in HAL_GTZC_TZIC_DisableIT()
1862 WRITE_REG(GTZC_TZIC1->IER4, TZIC1_IER4_ALL); in HAL_GTZC_TZIC_EnableIT()
2100 ier_itsources = READ_REG(GTZC_TZIC1_S->IER4); in HAL_GTZC_IRQHandler()
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h428 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32wba54xx.h445 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32wba55xx.h445 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h654 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32h562xx.h699 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32h533xx.h691 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32h563xx.h877 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32h573xx.h914 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h563 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32u545xx.h602 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32u575xx.h616 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32u585xx.h656 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32u5f7xx.h672 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32u595xx.h640 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32u5a5xx.h680 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32u599xx.h774 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32u5g7xx.h712 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32u5g9xx.h816 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32u5f9xx.h776 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member
Dstm32u5a9xx.h814 __IO uint32_t IER4; /*!< TZIC interrupt enable register 4, Address offset: 0x0C */ member