ICACHE (reference) in projects: hal_stm32-3.7.0

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Searched refs:ICACHE (Results 1 – 25 of 45) sorted by relevance

/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/src/
D	stm32h5xx_hal_icache.c	92 #if defined(ICACHE) && defined (HAL_ICACHE_MODULE_ENABLED) 179 if (READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U) in HAL_ICACHE_ConfigAssociativityMode() 185 MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, AssociativityMode); in HAL_ICACHE_ConfigAssociativityMode() 198 WRITE_REG(ICACHE->IER, 0U); in HAL_ICACHE_DeInit() 201 WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF \| ICACHE_FCR_CERRF); in HAL_ICACHE_DeInit() 204 CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN); in HAL_ICACHE_DeInit() 205 WRITE_REG(ICACHE->CR, ICACHE_CR_WAYSEL); in HAL_ICACHE_DeInit() 208 CLEAR_BIT(ICACHE->CR, ICACHE_MONITOR_HIT_MISS); in HAL_ICACHE_DeInit() 209 SET_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U)); in HAL_ICACHE_DeInit() 210 CLEAR_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U)); in HAL_ICACHE_DeInit() [all …]
D	stm32h5xx_ll_icache.c	`32 #if defined(ICACHE) 106 p_reg = &(ICACHE->CRR0) + (1U * Region); in LL_ICACHE_ConfigRegion()`
/hal_stm32-3.7.0/stm32cube/stm32l5xx/drivers/src/
D	stm32l5xx_hal_icache.c	92 #if defined(ICACHE) && defined (HAL_ICACHE_MODULE_ENABLED) 177 if (READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U) in HAL_ICACHE_ConfigAssociativityMode() 183 MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, AssociativityMode); in HAL_ICACHE_ConfigAssociativityMode() 196 WRITE_REG(ICACHE->IER, 0U); in HAL_ICACHE_DeInit() 199 WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF \| ICACHE_FCR_CERRF); in HAL_ICACHE_DeInit() 202 CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN); in HAL_ICACHE_DeInit() 203 WRITE_REG(ICACHE->CR, ICACHE_CR_WAYSEL); in HAL_ICACHE_DeInit() 206 CLEAR_BIT(ICACHE->CR, ICACHE_MONITOR_HIT_MISS); in HAL_ICACHE_DeInit() 207 SET_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U)); in HAL_ICACHE_DeInit() 208 CLEAR_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U)); in HAL_ICACHE_DeInit() [all …]
D	stm32l5xx_ll_icache.c	`32 #if defined(ICACHE) 103 p_reg = &(ICACHE->CRR0) + (1U * Region); in LL_ICACHE_ConfigRegion()`
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/src/
D	stm32wbaxx_hal_icache.c	92 #if defined(ICACHE) && defined (HAL_ICACHE_MODULE_ENABLED) 177 if (READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U) in HAL_ICACHE_ConfigAssociativityMode() 183 MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, AssociativityMode); in HAL_ICACHE_ConfigAssociativityMode() 196 WRITE_REG(ICACHE->IER, 0U); in HAL_ICACHE_DeInit() 199 WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF \| ICACHE_FCR_CERRF); in HAL_ICACHE_DeInit() 202 CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN); in HAL_ICACHE_DeInit() 203 WRITE_REG(ICACHE->CR, ICACHE_CR_WAYSEL); in HAL_ICACHE_DeInit() 206 CLEAR_BIT(ICACHE->CR, ICACHE_MONITOR_HIT_MISS); in HAL_ICACHE_DeInit() 207 SET_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U)); in HAL_ICACHE_DeInit() 208 CLEAR_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U)); in HAL_ICACHE_DeInit() [all …]
D	stm32wbaxx_ll_icache.c	`32 #if defined(ICACHE) 103 p_reg = &(ICACHE->CRR0) + (1U * Region); in LL_ICACHE_ConfigRegion()`
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/src/
D	stm32u5xx_hal_icache.c	92 #if defined(ICACHE) && defined (HAL_ICACHE_MODULE_ENABLED) 177 if (READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U) in HAL_ICACHE_ConfigAssociativityMode() 183 MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, AssociativityMode); in HAL_ICACHE_ConfigAssociativityMode() 196 WRITE_REG(ICACHE->IER, 0U); in HAL_ICACHE_DeInit() 199 WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF \| ICACHE_FCR_CERRF); in HAL_ICACHE_DeInit() 202 CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN); in HAL_ICACHE_DeInit() 203 WRITE_REG(ICACHE->CR, ICACHE_CR_WAYSEL); in HAL_ICACHE_DeInit() 206 CLEAR_BIT(ICACHE->CR, ICACHE_MONITOR_HIT_MISS); in HAL_ICACHE_DeInit() 207 SET_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U)); in HAL_ICACHE_DeInit() 208 CLEAR_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U)); in HAL_ICACHE_DeInit() [all …]
D	stm32u5xx_ll_icache.c	`32 #if defined(ICACHE) 103 p_reg = &(ICACHE->CRR0) + (1U * Region); in LL_ICACHE_ConfigRegion()`
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/src/
D	stm32h7rsxx_hal_icache.c	79 #if defined(ICACHE) && defined (HAL_ICACHE_MODULE_ENABLED) 148 if (READ_BIT(ICACHE->CR, ICACHE_CR_EN) != 0U) in HAL_ICACHE_ConfigAssociativityMode() 154 MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, AssociativityMode); in HAL_ICACHE_ConfigAssociativityMode() 167 WRITE_REG(ICACHE->IER, 0U); in HAL_ICACHE_DeInit() 170 WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF \| ICACHE_FCR_CERRF); in HAL_ICACHE_DeInit() 173 CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN); in HAL_ICACHE_DeInit() 174 WRITE_REG(ICACHE->CR, ICACHE_CR_WAYSEL); in HAL_ICACHE_DeInit() 177 CLEAR_BIT(ICACHE->CR, ICACHE_MONITOR_HIT_MISS); in HAL_ICACHE_DeInit() 178 SET_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U)); in HAL_ICACHE_DeInit() 179 CLEAR_BIT(ICACHE->CR, (ICACHE_MONITOR_HIT_MISS << 2U)); in HAL_ICACHE_DeInit() [all …]
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
D	stm32u5xx_ll_icache.h	34 #if defined(ICACHE) 189 #define LL_ICACHE_WriteReg(__REG__, __VALUE__) WRITE_REG(ICACHE->__REG__, (__VALUE__)) 196 #define LL_ICACHE_ReadReg(__REG__) READ_REG(ICACHE->__REG__) 221 SET_BIT(ICACHE->CR, ICACHE_CR_EN); in LL_ICACHE_Enable() 231 CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN); in LL_ICACHE_Disable() 241 return ((READ_BIT(ICACHE->CR, ICACHE_CR_EN) == (ICACHE_CR_EN)) ? 1UL : 0UL); in LL_ICACHE_IsEnabled() 254 MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, Mode); in LL_ICACHE_SetMode() 266 return (READ_BIT(ICACHE->CR, ICACHE_CR_WAYSEL)); in LL_ICACHE_GetMode() 277 SET_BIT(ICACHE->CR, ICACHE_CR_CACHEINV); in LL_ICACHE_Invalidate() 300 SET_BIT(ICACHE->CR, Monitors); in LL_ICACHE_EnableMonitors() [all …]
D	stm32u5xx_hal_icache.h	`30 #if defined(ICACHE) 172 #define __HAL_ICACHE_ENABLE_IT(__INTERRUPT__) SET_BIT(ICACHE->IER, (__INTERRUPT__)) 180 #define __HAL_ICACHE_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(ICACHE->IER, (__INTERRUPT__)) 190 ((READ_BIT(ICACHE->IER, (__INTERRUPT__)) == (__INTERRUPT__)) ? 1U : 0U) 200 #define __HAL_ICACHE_GET_FLAG(__FLAG__) ((READ_BIT(ICACHE->SR, (__FLAG__)) != 0U) ? 1U : 0U) 208 #define __HAL_ICACHE_CLEAR_FLAG(__FLAG__) WRITE_REG(ICACHE->FCR, (__FLAG__))`
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
D	stm32h5xx_ll_icache.h	34 #if defined(ICACHE) 193 #define LL_ICACHE_WriteReg(__REG__, __VALUE__) WRITE_REG(ICACHE->__REG__, (__VALUE__)) 200 #define LL_ICACHE_ReadReg(__REG__) READ_REG(ICACHE->__REG__) 225 SET_BIT(ICACHE->CR, ICACHE_CR_EN); in LL_ICACHE_Enable() 235 CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN); in LL_ICACHE_Disable() 245 return ((READ_BIT(ICACHE->CR, ICACHE_CR_EN) == (ICACHE_CR_EN)) ? 1UL : 0UL); in LL_ICACHE_IsEnabled() 258 MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, Mode); in LL_ICACHE_SetMode() 270 return (READ_BIT(ICACHE->CR, ICACHE_CR_WAYSEL)); in LL_ICACHE_GetMode() 281 SET_BIT(ICACHE->CR, ICACHE_CR_CACHEINV); in LL_ICACHE_Invalidate() 304 SET_BIT(ICACHE->CR, Monitors); in LL_ICACHE_EnableMonitors() [all …]
D	stm32h5xx_hal_icache.h	`30 #if defined(ICACHE) 176 #define __HAL_ICACHE_ENABLE_IT(__INTERRUPT__) SET_BIT(ICACHE->IER, (__INTERRUPT__)) 184 #define __HAL_ICACHE_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(ICACHE->IER, (__INTERRUPT__)) 194 ((READ_BIT(ICACHE->IER, (__INTERRUPT__)) == (__INTERRUPT__)) ? 1U : 0U) 204 #define __HAL_ICACHE_GET_FLAG(__FLAG__) ((READ_BIT(ICACHE->SR, (__FLAG__)) != 0U) ? 1U : 0U) 212 #define __HAL_ICACHE_CLEAR_FLAG(__FLAG__) WRITE_REG(ICACHE->FCR, (__FLAG__))`
/hal_stm32-3.7.0/stm32cube/stm32l5xx/drivers/include/
D	stm32l5xx_ll_icache.h	34 #if defined(ICACHE) 189 #define LL_ICACHE_WriteReg(__REG__, __VALUE__) WRITE_REG(ICACHE->__REG__, (__VALUE__)) 196 #define LL_ICACHE_ReadReg(__REG__) READ_REG(ICACHE->__REG__) 221 SET_BIT(ICACHE->CR, ICACHE_CR_EN); in LL_ICACHE_Enable() 231 CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN); in LL_ICACHE_Disable() 241 return ((READ_BIT(ICACHE->CR, ICACHE_CR_EN) == (ICACHE_CR_EN)) ? 1UL : 0UL); in LL_ICACHE_IsEnabled() 254 MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, Mode); in LL_ICACHE_SetMode() 266 return (READ_BIT(ICACHE->CR, ICACHE_CR_WAYSEL)); in LL_ICACHE_GetMode() 277 SET_BIT(ICACHE->CR, ICACHE_CR_CACHEINV); in LL_ICACHE_Invalidate() 300 SET_BIT(ICACHE->CR, Monitors); in LL_ICACHE_EnableMonitors() [all …]
D	stm32l5xx_hal_icache.h	`30 #if defined(ICACHE) 172 #define __HAL_ICACHE_ENABLE_IT(__INTERRUPT__) SET_BIT(ICACHE->IER, (__INTERRUPT__)) 180 #define __HAL_ICACHE_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(ICACHE->IER, (__INTERRUPT__)) 190 ((READ_BIT(ICACHE->IER, (__INTERRUPT__)) == (__INTERRUPT__)) ? 1U : 0U) 200 #define __HAL_ICACHE_GET_FLAG(__FLAG__) ((READ_BIT(ICACHE->SR, (__FLAG__)) != 0U) ? 1U : 0U) 208 #define __HAL_ICACHE_CLEAR_FLAG(__FLAG__) WRITE_REG(ICACHE->FCR, (__FLAG__))`
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/
D	stm32wbaxx_ll_icache.h	34 #if defined(ICACHE) 189 #define LL_ICACHE_WriteReg(__REG__, __VALUE__) WRITE_REG(ICACHE->__REG__, (__VALUE__)) 196 #define LL_ICACHE_ReadReg(__REG__) READ_REG(ICACHE->__REG__) 221 SET_BIT(ICACHE->CR, ICACHE_CR_EN); in LL_ICACHE_Enable() 231 CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN); in LL_ICACHE_Disable() 241 return ((READ_BIT(ICACHE->CR, ICACHE_CR_EN) == (ICACHE_CR_EN)) ? 1UL : 0UL); in LL_ICACHE_IsEnabled() 254 MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, Mode); in LL_ICACHE_SetMode() 266 return (READ_BIT(ICACHE->CR, ICACHE_CR_WAYSEL)); in LL_ICACHE_GetMode() 277 SET_BIT(ICACHE->CR, ICACHE_CR_CACHEINV); in LL_ICACHE_Invalidate() 300 SET_BIT(ICACHE->CR, Monitors); in LL_ICACHE_EnableMonitors() [all …]
D	stm32wbaxx_hal_icache.h	`30 #if defined(ICACHE) 172 #define __HAL_ICACHE_ENABLE_IT(__INTERRUPT__) SET_BIT(ICACHE->IER, (__INTERRUPT__)) 180 #define __HAL_ICACHE_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(ICACHE->IER, (__INTERRUPT__)) 190 ((READ_BIT(ICACHE->IER, (__INTERRUPT__)) == (__INTERRUPT__)) ? 1U : 0U) 200 #define __HAL_ICACHE_GET_FLAG(__FLAG__) ((READ_BIT(ICACHE->SR, (__FLAG__)) != 0U) ? 1U : 0U) 208 #define __HAL_ICACHE_CLEAR_FLAG(__FLAG__) WRITE_REG(ICACHE->FCR, (__FLAG__))`
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/drivers/include/
D	stm32h7rsxx_ll_icache.h	34 #if defined(ICACHE) 121 #define LL_ICACHE_WriteReg(__REG__, __VALUE__) WRITE_REG(ICACHE->__REG__, (__VALUE__)) 128 #define LL_ICACHE_ReadReg(__REG__) READ_REG(ICACHE->__REG__) 153 SET_BIT(ICACHE->CR, ICACHE_CR_EN); in LL_ICACHE_Enable() 163 CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN); in LL_ICACHE_Disable() 173 return ((READ_BIT(ICACHE->CR, ICACHE_CR_EN) == (ICACHE_CR_EN)) ? 1UL : 0UL); in LL_ICACHE_IsEnabled() 186 MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, Mode); in LL_ICACHE_SetMode() 198 return (READ_BIT(ICACHE->CR, ICACHE_CR_WAYSEL)); in LL_ICACHE_GetMode() 209 SET_BIT(ICACHE->CR, ICACHE_CR_CACHEINV); in LL_ICACHE_Invalidate() 232 SET_BIT(ICACHE->CR, Monitors); in LL_ICACHE_EnableMonitors() [all …]
D	stm32h7rsxx_hal_icache.h	`30 #if defined(ICACHE) 105 #define __HAL_ICACHE_ENABLE_IT(__INTERRUPT__) SET_BIT(ICACHE->IER, (__INTERRUPT__)) 113 #define __HAL_ICACHE_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(ICACHE->IER, (__INTERRUPT__)) 123 ((READ_BIT(ICACHE->IER, (__INTERRUPT__)) == (__INTERRUPT__)) ? 1U : 0U) 133 #define __HAL_ICACHE_GET_FLAG(__FLAG__) ((READ_BIT(ICACHE->SR, (__FLAG__)) != 0U) ? 1U : 0U) 141 #define __HAL_ICACHE_CLEAR_FLAG(__FLAG__) WRITE_REG(ICACHE->FCR, (__FLAG__))`
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
D	stm32wba52xx.h	`1441 #define ICACHE ICACHE_S macro 1564 #define ICACHE ICACHE_NS macro`
D	stm32wba54xx.h	`1536 #define ICACHE ICACHE_S macro 1672 #define ICACHE ICACHE_NS macro`
D	stm32wba55xx.h	`1536 #define ICACHE ICACHE_S macro 1672 #define ICACHE ICACHE_NS macro`
D	stm32wba50xx.h	`1097 #define ICACHE ICACHE_NS macro`
/hal_stm32-3.7.0/stm32cube/stm32l5xx/soc/
D	stm32l552xx.h	`2245 #define ICACHE ICACHE_S macro 2659 #define ICACHE ICACHE_NS macro`
/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/
D	stm32h523xx.h	`2382 #define ICACHE ICACHE_S macro 2716 #define ICACHE ICACHE_NS macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
bsim-3.7.0
canopennode-2.7.6
canopennode-3.5.0-3.4.0
chre-3.4.0
civetweb-2.7.6
cmsis-2.7.6
cmsis-3.4.0
cmsis-3.5.0
cmsis-3.7.0-3.6.0
cmsis-dsp-3.5.0
cmsis-dsp-3.7.0-3.6.0
cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
fatfs-3.7.0-3.6.0-3.5.0-3.4.0
hal_adi-3.7.0
hal_altera-2.7.6
hal_altera-3.6.0-3.5.0-3.4.0
hal_altera-3.7.0
hal_ambiq-3.5.0
hal_ambiq-3.6.0
hal_ambiq-3.7.0
hal_atmel-2.7.6
hal_atmel-3.5.0-3.4.0
hal_atmel-3.6.0
hal_atmel-3.7.0
hal_cypress-2.7.6
hal_espressif-2.7.6
hal_espressif-3.4.0
hal_espressif-3.5.0
hal_espressif-3.6.0
hal_espressif-3.7.0
hal_ethos_u-3.6.0-3.5.0-3.4.0
hal_ethos_u-3.7.0
hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0
hal_infineon-2.7.6
hal_infineon-3.4.0
hal_infineon-3.5.0
hal_infineon-3.6.0
hal_infineon-3.7.0
hal_intel-3.5.0
hal_intel-3.6.0
hal_intel-3.7.0
hal_microchip-2.7.6
hal_microchip-3.6.0-3.5.0-3.4.0
hal_microchip-3.7.0
hal_nordic-2.7.6
hal_nordic-3.4.0
hal_nordic-3.5.0
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hal_nordic-3.7.0
hal_nuvoton-2.7.6
hal_nuvoton-3.4.0
hal_nuvoton-3.5.0
hal_nuvoton-3.6.0
hal_nuvoton-3.7.0
hal_nxp-2.7.6
hal_nxp-3.4.0
hal_nxp-3.5.0
hal_nxp-3.6.0
hal_nxp-3.7.0
hal_openisa-2.7.6
hal_openisa-3.5.0-3.4.0
hal_openisa-3.7.0-3.6.0
hal_quicklogic-3.6.0-3.5.0-3.4.0-2.7.6
hal_quicklogic-3.7.0
hal_renesas-3.4.0
hal_renesas-3.5.0
hal_renesas-3.6.0
hal_renesas-3.7.0
hal_rpi_pico-3.4.0
hal_rpi_pico-3.7.0-3.6.0-3.5.0
hal_silabs-2.7.6
hal_silabs-3.4.0
hal_silabs-3.5.0
hal_silabs-3.6.0
hal_silabs-3.7.0
hal_st-2.7.6
hal_st-3.4.0
hal_st-3.5.0
hal_st-3.6.0
hal_st-3.7.0
hal_stm32-2.7.6
hal_stm32-3.4.0
hal_stm32-3.5.0
hal_stm32-3.6.0
hal_stm32-3.7.0
hal_telink-2.7.6
hal_telink-3.6.0-3.5.0-3.4.0
hal_telink-3.7.0
hal_ti-2.7.6
hal_ti-3.4.0
hal_ti-3.7.0-3.6.0-3.5.0
hal_wurthelektronik-3.5.0-3.4.0
hal_wurthelektronik-3.7.0-3.6.0
hal_xtensa-2.7.6
hal_xtensa-3.4.0
hal_xtensa-3.5.0
hal_xtensa-3.6.0
hal_xtensa-3.7.0
hostap-3.6.0
hostap-3.7.0
liblc3-3.5.0-3.4.0
liblc3-3.7.0-3.6.0
libmetal-2.7.6
libmetal-3.5.0-3.4.0
libmetal-3.6.0
libmetal-3.7.0
littlefs-2.7.6
littlefs-3.5.0-3.4.0
littlefs-3.7.0-3.6.0
loramac-node-2.7.6
loramac-node-3.4.0
loramac-node-3.6.0-3.5.0
loramac-node-3.7.0
lvgl-2.7.6
lvgl-3.4.0
lvgl-3.5.0
lvgl-3.6.0
lvgl-3.7.0
lz4-3.4.0-2.7.6
mbedtls-2.7.6
mbedtls-3.4.0
mbedtls-3.5.0
mbedtls-3.6.0
mbedtls-3.7.0
mcuboot-2.7.6
mcuboot-3.4.0
mcuboot-3.5.0
mcuboot-3.6.0
mcuboot-3.7.0
mcumgr-2.7.6
mipi-sys-t-2.7.6
mipi-sys-t-3.4.0
mipi-sys-t-3.6.0-3.5.0
mipi-sys-t-3.7.0
nanopb-2.7.6
nanopb-3.4.0
net-tools-2.7.6
net-tools-3.4.0
net-tools-3.5.0
net-tools-3.6.0
net-tools-3.7.0
nrf_hw_models-2.7.6
nrf_hw_models-3.4.0
nrf_hw_models-3.5.0
nrf_hw_models-3.6.0
nrf_hw_models-3.7.0
open-amp-2.7.6
open-amp-3.4.0
open-amp-3.5.0
open-amp-3.6.0
open-amp-3.7.0
openthread-2.7.6
openthread-3.4.0
openthread-3.5.0
openthread-3.6.0
openthread-3.7.0
percepio-3.5.0
percepio-3.6.0
percepio-3.7.0
picolibc-3.5.0-3.4.0
picolibc-3.7.0-3.6.0
psa-arch-tests-3.4.0
segger-2.7.6
segger-3.4.0
segger-3.6.0-3.5.0
segger-3.7.0
sof-2.7.6
sof-3.4.0
tf-m-tests-3.4.0
tflite-micro-3.4.0-2.7.6
thrift-3.4.0
tinycbor-2.7.6
tinycrypt-3.6.0-3.5.0-3.4.0-2.7.6
tinycrypt-3.7.0
trusted-firmware-a-3.4.0
trusted-firmware-a-3.6.0-3.5.0
trusted-firmware-a-3.7.0
trusted-firmware-m-3.4.0
trusted-firmware-m-3.5.0
trusted-firmware-m-3.6.0
trusted-firmware-m-3.7.0
uoscore-uedhoc-3.4.0
uoscore-uedhoc-3.5.0
uoscore-uedhoc-3.6.0
uoscore-uedhoc-3.7.0
zcbor-3.5.0-3.4.0
zcbor-3.6.0
zcbor-3.7.0
zscilib-3.4.0