/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/ |
D | stm32wbaxx_hal_gtzc.h | 194 #define GTZC_PERIPH_GPDMA1 (GTZC_PERIPH_REG4 | GTZC_CFGR4_GPDMA1_Pos)
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/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_hal_gtzc.h | 363 #define GTZC_PERIPH_GPDMA1 (GTZC1_PERIPH_REG4 | GTZC_CFGR4_GPDMA1_Pos)
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/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_hal_gtzc.h | 300 #define GTZC_PERIPH_GPDMA1 (GTZC1_PERIPH_REG4 | GTZC_CFGR4_GPDMA1_Pos)
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/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/ |
D | stm32h523xx.h | 15852 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 15853 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 16222 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 16374 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 16526 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32h562xx.h | 17186 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 17187 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 17670 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 17860 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 18050 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32h533xx.h | 16401 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 16402 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 16785 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 16943 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 17101 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32h563xx.h | 19288 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 19289 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 19790 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 19986 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 20182 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32h573xx.h | 19837 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 19838 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 20353 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 20555 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 20757 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32h503xx.h | 10910 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 10911 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
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/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 17910 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 17911 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 18302 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 18464 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 18624 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32u545xx.h | 18468 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 18469 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 18880 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 19050 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 19218 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32u575xx.h | 19518 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 19519 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 19964 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 20150 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 20336 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32u585xx.h | 20134 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 20135 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 20602 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 20798 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 20994 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32u5f7xx.h | 22306 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 22307 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 22828 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 23046 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 23264 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32u595xx.h | 20701 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 20702 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 21183 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 21385 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 21587 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32u5a5xx.h | 21317 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 21318 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 21821 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 22033 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 22245 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32u599xx.h | 24485 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 24486 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 24997 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 25209 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 25421 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32u5g7xx.h | 22922 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 22923 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 23466 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 23694 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 23922 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32u5g9xx.h | 26065 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 26066 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 26615 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 26845 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 27075 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32u5f9xx.h | 25449 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 25450 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 25977 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 26197 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 26417 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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D | stm32u5a9xx.h | 25101 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro 25102 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos) 25635 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 25857 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos 26079 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
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/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba52xx.h | 5683 #define GTZC_CFGR4_GPDMA1_Pos GTZC_TZIC_IER4_GPDMA1IE_Pos macro 5684 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
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D | stm32wba54xx.h | 5872 #define GTZC_CFGR4_GPDMA1_Pos GTZC_TZIC_IER4_GPDMA1IE_Pos macro 5873 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
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D | stm32wba55xx.h | 5872 #define GTZC_CFGR4_GPDMA1_Pos GTZC_TZIC_IER4_GPDMA1IE_Pos macro 5873 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
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