/hal_stm32-3.7.0/stm32cube/stm32wbaxx/drivers/include/ |
D | stm32wbaxx_hal_gtzc.h | 159 #define GTZC_PERIPH_I2C1 (GTZC_PERIPH_REG1 | GTZC_CFGR1_I2C1_Pos)
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/hal_stm32-3.7.0/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_hal_gtzc.h | 184 #define GTZC_PERIPH_I2C1 (GTZC_PERIPH_REG1 | GTZC_CFGR1_I2C1_Pos)
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/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_hal_gtzc.h | 214 #define GTZC_PERIPH_I2C1 (GTZC1_PERIPH_REG1 | GTZC_CFGR1_I2C1_Pos)
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/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_hal_gtzc.h | 205 #define GTZC_PERIPH_I2C1 (GTZC1_PERIPH_REG1 | GTZC_CFGR1_I2C1_Pos)
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/hal_stm32-3.7.0/stm32cube/stm32l5xx/soc/ |
D | stm32l552xx.h | 16387 #define GTZC_CFGR1_I2C1_Pos (14U) macro 16388 #define GTZC_CFGR1_I2C1_Msk ( 0x01UL << GTZC_CFGR1_I2C1_Pos ) 16527 #define GTZC_TZSC_SECCFGR1_I2C1SEC_Pos GTZC_CFGR1_I2C1_Pos 16629 #define GTZC_TZSC_PRIVCFGR1_I2C1PRIV_Pos GTZC_CFGR1_I2C1_Pos 16731 #define GTZC_TZIC_IER1_I2C1IE_Pos GTZC_CFGR1_I2C1_Pos 16871 #define GTZC_TZIC_SR1_I2C1F_Pos GTZC_CFGR1_I2C1_Pos 17011 #define GTZC_TZIC_FCR1_I2C1FC_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32l562xx.h | 17126 #define GTZC_CFGR1_I2C1_Pos (14U) macro 17127 #define GTZC_CFGR1_I2C1_Msk ( 0x01UL << GTZC_CFGR1_I2C1_Pos ) 17272 #define GTZC_TZSC_SECCFGR1_I2C1SEC_Pos GTZC_CFGR1_I2C1_Pos 17378 #define GTZC_TZSC_PRIVCFGR1_I2C1PRIV_Pos GTZC_CFGR1_I2C1_Pos 17484 #define GTZC_TZIC_IER1_I2C1IE_Pos GTZC_CFGR1_I2C1_Pos 17630 #define GTZC_TZIC_SR1_I2C1F_Pos GTZC_CFGR1_I2C1_Pos 17776 #define GTZC_TZIC_FCR1_I2C1FC_Pos GTZC_CFGR1_I2C1_Pos
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/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/ |
D | stm32h523xx.h | 15774 #define GTZC_CFGR1_I2C1_Pos (17U) macro 15775 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 15927 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16036 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16144 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16296 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16448 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32h562xx.h | 17074 #define GTZC_CFGR1_I2C1_Pos (17U) macro 17075 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 17265 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 17412 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 17558 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 17748 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 17938 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32h533xx.h | 16319 #define GTZC_CFGR1_I2C1_Pos (17U) macro 16320 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 16478 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16591 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16703 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 16861 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 17019 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32h563xx.h | 19170 #define GTZC_CFGR1_I2C1_Pos (17U) macro 19171 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 19367 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19520 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19672 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19868 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20064 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32h573xx.h | 19715 #define GTZC_CFGR1_I2C1_Pos (17U) macro 19716 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 19918 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20075 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20231 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20433 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20635 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32h503xx.h | 10856 #define GTZC_CFGR1_I2C1_Pos (17U) macro 10857 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 10963 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 17846 #define GTZC_CFGR1_I2C1_Pos (13U) macro 17847 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 18010 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18124 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18238 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18400 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18562 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u545xx.h | 18398 #define GTZC_CFGR1_I2C1_Pos (13U) macro 18399 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 18570 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18690 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18810 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 18980 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19150 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u575xx.h | 19440 #define GTZC_CFGR1_I2C1_Pos (13U) macro 19441 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 19626 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19756 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 19886 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20072 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20258 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u585xx.h | 20050 #define GTZC_CFGR1_I2C1_Pos (13U) macro 20051 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 20246 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20382 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20518 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20714 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20910 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5f7xx.h | 22206 #define GTZC_CFGR1_I2C1_Pos (13U) macro 22207 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 22424 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 22576 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 22728 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 22946 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 23164 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u595xx.h | 20613 #define GTZC_CFGR1_I2C1_Pos (13U) macro 20614 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 20815 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 20955 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21095 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21297 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21499 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5a5xx.h | 21223 #define GTZC_CFGR1_I2C1_Pos (13U) macro 21224 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 21435 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21581 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21727 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 21939 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 22151 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u599xx.h | 24387 #define GTZC_CFGR1_I2C1_Pos (13U) macro 24388 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 24599 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 24749 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 24899 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25111 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25323 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5g7xx.h | 22816 #define GTZC_CFGR1_I2C1_Pos (13U) macro 22817 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 23044 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 23202 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 23360 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 23588 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 23816 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5g9xx.h | 25957 #define GTZC_CFGR1_I2C1_Pos (13U) macro 25958 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 26187 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26347 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26507 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26737 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26967 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5f9xx.h | 25347 #define GTZC_CFGR1_I2C1_Pos (13U) macro 25348 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 25567 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25721 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25875 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26095 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 26315 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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D | stm32u5a9xx.h | 24997 #define GTZC_CFGR1_I2C1_Pos (13U) macro 24998 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos) 25219 #define GTZC_TZSC1_SECCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25375 #define GTZC_TZSC1_PRIVCFGR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25531 #define GTZC_TZIC1_IER1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25753 #define GTZC_TZIC1_SR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos 25975 #define GTZC_TZIC1_FCR1_I2C1_Pos GTZC_CFGR1_I2C1_Pos
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/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba52xx.h | 5631 #define GTZC_CFGR1_I2C1_Pos GTZC_TZSC_SECCFGR1_I2C1SEC_Pos macro 5632 #define GTZC_CFGR1_I2C1_Msk (0x01UL << GTZC_CFGR1_I2C1_Pos)
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